參數(shù)資料
型號： AD8421BRZ-RL
廠商： Analog Devices Inc
文件頁數(shù)： 19/28頁
文件大?。?/td> 0K
描述： IC OPAMP INST 10MHZ LP LN 8MSOP
標準包裝： 2,500
放大器類型： 儀表
電路數(shù)： 1
轉換速率： 35 V/µs
-3db帶寬： 10MHz
電流 - 輸入偏壓： 100pA
電壓 - 輸入偏移： 25µV
電流 - 電源： 2mA
電流 - 輸出 / 通道： 65mA
電壓 - 電源，單路/雙路(±)： 5 V ~ 36 V，±2.5 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 8-SOICN
包裝： 帶卷 (TR)
AD8421
Data Sheet
Rev. 0 | Page 26 of 28
DRIVING AN ADC
The Class AB output stage, low noise and distortion, and high
bandwidth and slew rate make the AD8421 a good choice for
driving an ADC in a data acquisition system that requires front-
end gain, high CMRR, and dc precision. Figure 71 shows the
AD8421, in a gain-of-10 configuration, driving the AD7685,
a 16-bit, 250 kSPS pseudodifferential SAR ADC. The RC low-pass
filter that is shown between the AD8421 and the AD7685 has
several purposes. It isolates the amplifier output from excessive
loading from the dynamic ADC inputs, reduces the noise
bandwidth of the amplifier, and provides overload protection for
the AD7685 analog inputs. The filter cutoff can be determined
empirically. To achieve the best ac performance, keep the impe-
dance magnitude greater than 1 kΩ at the maximum input signal
frequency, and set the filter cutoff to settle to LSB in one
sampling period for a full-scale step. For additional considerations,
refer to the data sheet of the ADC in use.
In a gain-of-10 configuration, the AD8421 has approximately
8 nV/√Hz voltage noise RTI (See the Calculating the Noise of
the Input Stage section.) The front-end gain makes the system
ten times more sensitive to input signals, with only a 7.5 dB
reduction of SNR. The high current output and load regulation
of the ADR435 allow the AD7685 to be powered directly from the
reference without the need to provide another analog supply rail.
The reference pin buffer may be any low power, unity-gain stable,
dc precision op amp with less than approximately 25 nV/√Hz of
wideband noise, such as the OP1177. Not all proper decoupling is
shown in Figure 71. Take care to follow decoupling guidelines for
both amplifiers and the ADR435.
AD7685
REF
GND
VDD
IN–
IN+
VIO
SDI
SCK
SDO
CNV
3- OR 4-WIRE INTERFACE
0.1F
+12V
ADR435
3nF
+IN
–IN
AD8421
G = 10
+12V
–12V
1.1k
±250mV
+5V
1F
2.5V
10k
10
REF
10F
5k
1012
3-
070
100
Figure 71. AD8421 Driving an ADC
0
–20
–40
–160
–140
–120
–100
–80
–60
0
25
50
75
100
125
AMPL
IT
UD
E
(d
B
O
F
U
L
SC
A
L
E)
FREQUENCY (kHz)
1
0123-
071
SNR 81.12dB
THD –100.91dB
SFDR 90.71dB
Figure 72. Typical Spectrum of the AD8421 (G = 10) Driving the AD7685
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