參數(shù)資料
型號(hào): AD8420ARMZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 16/28頁
文件大?。?/td> 0K
描述: IC AMP INSTR RR 2.5KHZ 8MSOP
標(biāo)準(zhǔn)包裝: 3,000
放大器類型: 儀表
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 1 V/µs
-3db帶寬: 250kHz
電流 - 輸入偏壓: 20nA
電壓 - 輸入偏移: 250µV
電流 - 電源: 85µA
電流 - 輸出 / 通道: 10mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 36 V,±2.7 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
Data Sheet
AD8420
Rev. 0 | Page 23 of 28
OUTPUT BUFFERING
The AD8420 is designed to drive loads of 20 kΩ or greater but
can deliver up to 10 mA to heavier loads at lower output voltage
swings (see Figure 42). If more output current is required, buffer
the AD8420 output with a precision op amp. Figure 67 shows
the recommended configuration using the ADA4692-2 as a single
supply. This low power op amp can swing its output from 1 V to
4 V on a single 5 V supply while sourcing or sinking more than
30 mA of current. When using this configuration, the load seen
by the AD8420 is approximately R1 + R2.
R1
R2
+5V
–VS
+VS
–VS
+VS
0.1F
VOUT
0.1F
ADA4692-2
VIN
AD8420
VREF
099
45
-065
Figure 67. Output Buffering
Because the ADA4692-2 is a dual op amp, another op amp is
now free for use as an active filter stage or to buffer another
AD8420 output on the same PCB. Figure 68 shows another
suggestion for how to use this second op amp. In this circuit,
the voltage from the wiper of a potentiometer is buffered by the
ADA4692-2, allowing a variable level shift of the output. Resistors
above and below the potentiometer reduce the total range of the
level shift but increase the precision. If the potentiometer were
connected directly to the REF pin of the AD8420, gain error would
be introduced from the variable resistance. The potentiometer can
be tuned in hardware or software, depending on the type of
potentiometer chosen. For a list of digital potentiometers made
by Analog Devices, Inc., visit www.analog.com/digipots/.
R1
R2
+5V
0.1F
VOUT
0.1F
ADA4692-2
VIN
AD8420
REF
R
CW
W
CCW
SUGGESTION FOR SECOND
AMPLIFIER: VARIABLE
LEVEL SHIFT WITHOUT
AFFECTING GAIN
099
45-
066
Figure 68. Variable Level Shift
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