參數(shù)資料
型號: AD8390ARC-REEL
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:D38999 Series III; No. of Contacts:10; Connector Shell Size:13; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No
中文描述: OP-AMP, 3000 uV OFFSET-MAX, PDSO16
封裝: MO-137, QSOP-16
文件頁數(shù): 12/16頁
文件大小: 531K
代理商: AD8390ARC-REEL
AD8390
LAYOUT, GROUNDING, AND BYPASSING
The first layout requirement is for a good solid ground plane
that covers as much of the board area around the AD8390 as
possible. The only exception to this is that the two input pins
should be kept a few millimeters from the ground plane, and
ground should be removed from inner layers and the opposite
side of the board under the input traces. This minimizes the
stray capacitance on these nodes and helps preserve the gain
flatness versus frequency.
The power supply pins should be bypassed as close as possible
to the device on a ground plane common with signal ground.
Good high frequency, ceramic chip capacitors should be used.
This bypassing should be done with a capacitance value of
0.01 μF to 0.1 μF for each supply. Low frequency bypassing
should be provided with 10 μF tantalum capacitors from each
supply to signal ground. The signal routing should be short and
direct to avoid parasitic effects, particularly on traces connected
to the amplifier inputs. Wherever there are complementary
signals, a symmetrical layout should be provided to the extent
possible to maximize the balance performance. When running
differential signals over a long distance, the traces on the PCB
should be close together.
POWER DISSIPATION AND THERMAL
MANAGEMENT
The AD8390 was designed to be the most efficient class AB
ADSL/ADSL2+ line driver available. Figure 11 shows the total
power consumption (delivered line power and power consumed)
of the AD8390 driving ADSL signals at varying output powers
and power modes. To accurately determine the amount of
power dissipated by the AD8390, it is necessary to subtract the
power delivered to the load, matching losses, and transformer
losses as follows:
Rev. C | Page 12 of 16
To obtain optimum thermal performance from the AD8390 in
either package, it is essential that the thermal pad be soldered to
a ground plane with minimal thermal resistance. This is par-
ticularly true for dense circuit designs with multiple integrated
circuits. Furthermore, the PCB should be designed in such a
manner as to draw the heat away from the ICs. Figure 26
illustrates the relationship between thermal resistance (°C/W)
and the copper area (mm
2
) for the AD8390ACP soldered down
to a 4-layer board with a given copper area.
Figure 26 can be used to help determine the copper board area
required for proper thermal management of the AD8390. The
power dissipation of the AD8390 can be computed using
Equation 11. This number can then be inserted into the
following equation to yield the required θ
JA
:
T
RISE
JA
W
C
P
AD8390
°
=
=
θ
(12)
where
T
RISE
is the delta from the maximum expected ambient
temperature to the highest allowable die temperature. It is
generally recommended that the maximum die temperature be
limited to 125°C, and in no case should it be allowed to exceed
150°C.
Using the θ
JA
computed in Equation 12, Figure 26 can be used to
determine the minimum copper area required for proper thermal
dissipation of the AD8390.
Cu AREA (mm
2)
0
90
θ
J
0
20
10
30
40
50
60
70
80
1
100
1000
10
10000
mW
losses
P
mW
load
P
supply,mW
P
AD8390
P
,
,
=
(11)
where:
P
supply,mW
is the total supply power in mW drawn by the AD8390.
P
load,mW
is the power delivered into a 100 Ω twisted-pair line in mW
P
losses,mW
is the power dissipated by the matching resistors and
the transformer in mW.
While this discussion focuses mainly on ADSL applications, the
same premise can be applied to determining the power dissipa-
tion of the AD8390 in any application.
Figure 26. Thermal Resistance vs. Copper Area
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