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| 型號： | AD835ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLIER 4-QUADRANT 8-DIP |
| 標準包裝： | 50 |
| 功能： | 模擬乘法器 |
| 位元/級數(shù)： | 四象限 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 789 (CN2011-ZH PDF) |
AD835
Rev. D | Page 12 of 16
SQUARING AND FREQUENCY DOUBLING
Amplitude domain squaring of an input signal, E, is achieved
simply by connecting the X and Y inputs in parallel to produce
an output of E2/U. The input can have either polarity, but the
output in this case is always positive. The output polarity can be
reversed by interchanging either the X or Y inputs.
When the input is a sine wave E sin ωt, a signal squarer behaves
as a frequency doubler because
()
(
ωt )
U
E
U
ωt
E
2
cos
1
2
sin
2
=
(6)
While useful, Equation 6 shows a dc term at the output, which
varies strongly with the amplitude of the input, E.
Figure 24 shows a frequency doubler that overcomes this
limitation and provides a relatively constant output over a
moderately wide frequency range, determined by the time
constant R1C1. The voltage applied to the X and Y inputs is
exactly in quadrature at a frequency f = πC1R1, and their
amplitudes are equal. At higher frequencies, the X input becomes
smaller while the Y input increases in amplitude; the opposite
happens at lower frequencies. The result is a double frequency
output centered on ground whose amplitude of 1 V for a 1 V
input varies by only 0.5% over a frequency range of ±10%.
Because there is no squared dc component at the output, sudden
changes in the input amplitude do not cause a bounce in the dc level.
00883-024
AD835
1
2
3
4
8
VOLTAGE
OUTPUT
R2
97.6
Ω
R1
R3
301
Ω
X2
VP
W
Y1
X1
Y2
+5V
C1
–5V
VN
Z
7
6
5
VG
Figure 24. Broadband Zero-Bounce Frequency Doubler
This circuit is based on the identity
θ
=
θ
2
sin
2
1
sin
cos
(7)
At ωO = 1/C1R1, the X input leads the input signal by 45° (and is
attenuated by √2, while the Y input lags the input signal by 45°
and is also attenuated by √2. Because the X and Y inputs are 90°
out of phase, the response of the circuit is
()
(
t
U
E
t
E
t
E
U
W
ω
=
°
+
ω
°
ω
=
2
sin
2
45
sin
2
45
sin
2
1
2
)
(8)
which has no dc component, R2 and R3 are included to restore
the output to 1 V for an input amplitude of 1 V (the same gain
adjustment as previously mentioned). Because the voltage across
the capacitor (C1) decreases with frequency, while that across
the resistor (R1) increases, the amplitude of the output varies
only slightly with frequency. In fact, it is only 0.5% below its full
value (at its center frequency ωO = 1/C1R1) at 90% and 110% of
this frequency.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD835AR | 功能描述:IC MULTIPLIER 4-QUADRANT 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側(cè)面銅焊 包裝:管件 |
| AD835AR-ND | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD835AR-REEL | 功能描述:IC MULTIPLIER 4-QUADRANT 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側(cè)面銅焊 包裝:管件 |
| AD835AR-REEL7 | 功能描述:IC MULTIPLIER 4-QUADRANT 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側(cè)面銅焊 包裝:管件 |
| AD835ARZ | 功能描述:IC MULTIPLIER 4-QUADRANT 8-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側(cè)面銅焊 包裝:管件 |
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