參數(shù)資料
型號: AD8346ARUZ-REEL7
廠商: ANALOG DEVICES INC
元件分類: 調(diào)制器/解調(diào)器
英文描述: 800 MHz - 2500 MHz RF/MICROWAVE I/Q MODULATOR
封裝: LEAD FREE, TSSOP-16
文件頁數(shù): 5/20頁
文件大小: 397K
代理商: AD8346ARUZ-REEL7
AD8346
Rev. A | Page 13 of 20
AC-COUPLED INTERFACE
An ac-coupled interface can also be implemented, as shown in
Figure 29. This is an advantage because there is almost no
voltage loss due to the biasing network, allowing the AD8346
inputs to be driven by the full 2 V p-p differential signal from
the AD9761 (each of the DAC’s 4 outputs delivering 1 V p-p).
As in the dc-coupled case, the bias levels on the I and Q inputs
should be set to as precise a level as possible, relative to each
other. This prevents the introduction of additional input offset
voltages. In Figure 29, the bias level on each input is set to
approximately 1.2 V. The 2.43 kΩ resistors should have a ratio
tolerance of 0.1% or better.
The network shown has a high-pass corner frequency of
approximately 14.3 kHz (note that the 12 kΩ input impedance
of the AD8346 has been factored into this calculation).
Increasing the resistors in the network or increasing the
coupling capacitance reduces the corner frequency further.
Note that the LO suppression can be manually optimized by
replacing a portion of the four top 2.43 kΩ resistors with
potentiometers. In this case, the bottom four resistors in the
biasing network no longer need to be precision devices.
2
×
LATCH
I
IOUTB
IOUTA
2
×
LATCH
Q
QOUTB
QOUTA
MUX
CONTROL
SELECT
WRITE
CLOCK
AD9761
DVDD
DCOM
AVDD
0.1
μF
RSET
2k
Ω
SLEEP
FS ADJ
REFIO
DAC
DATA
INPUTS
CFILTER
100
Ω
100
Ω
CFILTER
100
Ω
100
Ω
0.1
μF
1k
Ω
5V
PHASE
SPLITTER
Σ
VOUT
IBBP
IBBN
QBBP
QBBN
AD8346
LOIP
LOIN
VPS1
VPS2
1V p-p EACH PIN
WITH VCM = 1.2V
5V
0.01
μF
0.01
μF
0.01
μF
0.01
μF
I
DAC
2.43k
Ω
2.43k
Ω
2.43k
Ω
2.43k
Ω
2.43k
Ω
2.43k
Ω
2.43k
Ω
2.43k
Ω
Q
DAC
05335-029
Figure 29. AC-Coupled DAC Interface
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