參數(shù)資料
型號: AD829AR
廠商: ANALOG DEVICES INC
元件分類: 音頻/視頻放大
英文描述: High-Speed, Low-Noise Video Op Amp
中文描述: 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝: PLASTIC, MS-012AA, SOIC-8
文件頁數(shù): 8/12頁
文件大?。?/td> 336K
代理商: AD829AR
AD829
REV. C
–8–
T HE ORY OF OPE RAT ION
T he AD829 is fabricated on Analog Devices’ proprietary comple-
mentary bipolar (CB) process which provides PNP and NPN
transistors with similar f
T
s of 600 MHz. As shown in Figure 25,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600
μ
A collector current. T his
gives the input devices a high transconductance and hence gives
the AD829 a low noise figure of 2 nV/
Hz
@ 1 kHz.
T he input stage drives a folded cascode which consists of a fast
pair of PNP transistors. T hese PNPs then drive a current mirror
which provides a differential-input to single-ended-output con-
version. T he high speed PNPs are also used in the current-
amplifying output stage which provides high current gain of
40,000. Even under conditions of heavy loading, the high f
T
s
of the NPN & PNPs, produced using the CB process, permit
cascading two stages of emitter followers while still maintaining
60
°
of phase margin at closed-loop bandwidths greater than
50 MHz.
T wo stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the C
COMP
pin) from the output so that the AD829 can maintain a high dc
open-loop gain, even into low load impedances: 92 dB into a
150
load, 100 dB into a 1 k
load. Laser trimming and
PT AT biasing assure low offset voltage and low offset voltage
drift enabling the user to eliminate ac coupling in many
applications.
For added flexibility, the AD829 provides access to the internal
frequency compensation node. T his allows the user to customize
frequency response characteristics for a particular application.
Unity gain stability requires a compensation capacitance of
68 pF (Pin 5 to ground) which will yield a small signal band-
width of 66 MHz and slew rate of 16 V/
μ
s. T he slew rate and
gain bandwidth product will vary inversely with compensation
capacitance. T able I and the graph of Figure 28 show the opti-
mum compensation capacitance and the resulting slew rate for a
desired noise gain. For gains between 1 and 20, C
COMP
can be
chosen to keep the small signal bandwidth relatively constant.
T he minimum gain which will still provide stability also de-
pends on the value of external compensation capacitance.
An RC network in the output stage (Figure 25) completely re-
moves the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low fre-
quencies, and with low capacitive loads, the gain from the com-
pensation node to the output is very close to unity. In this case,
C is bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage–
this reduces the gain, and subsequently, C is incompletely boot-
strapped. T herefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls.
As the load capacitance is further increased, the bandwidth con-
tinues to fall, and the amplifier remains stable.
E xternally Compensating the AD829
T he AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, there are two methods of
frequency compensating the amplifier to achieve closed-loop
stability; these are the shunt and current feedback compensation
methods.
Figure 25. AD829 Simplified Schematic
Shunt Compensation
Figures 26 & 27 show that the first method, shunt compensa-
tion, has an external compensation capacitor, C
COMP
, connected
between the compensation pin and ground. T his external
capacitor is tied in parallel with approximately 3 pF of inter-
nal capacitance at the compensation node. In addition, a
small capacitance, C
LEAD
, in parallel with resistor R2, compen-
sates for the capacitance at the amplifier’s inverting input.
Figure 26. Inverting Amplifier Connection Using External
Shunt Compensation
Figure 27. Noninverting Amplifier Connection Using
External Shunt Compensation
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