參數(shù)資料
型號: AD8278ARZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 9/24頁
文件大小: 0K
描述: IC OPAMP DIFFERENTIAL 8SOIC
標準包裝: 1,000
放大器類型: 差分
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 1.4 V/µs
增益帶寬積: 1MHz
電壓 - 輸入偏移: 50µV
電流 - 電源: 200µA
電流 - 輸出 / 通道: 15mA
電壓 - 電源,單路/雙路(±): 2 V ~ 36 V,±2 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD8278/AD8279
Rev. C | Page 17 of 24
POWER SUPPLIES
The AD8278 and AD8279 operate extremely well over a very
wide range of supply voltages. They can operate on a single
supply as low as 2 V and as high as 36 V, under appropriate
setup conditions.
For best performance, the user should ensure that the internal
op amp is biased correctly. The internal input terminals of the
op amp must have sufficient voltage headroom to operate
properly. Proper operation of the part requires at least 1.5 V
between the positive supply rail and the op amp input terminals.
This relationship is expressed in the following equation:
V
5
.
1
+
<
+
S
REF
V
R2
R1
For example, when operating on a +VS= 2 V single supply and
VREF = 0 V, it can be seen from Figure 50 that the op amp input
terminals are biased at 0 V, allowing more than the required 1.5 V
headroom. However, if VREF = 1 V under the same conditions, the
input terminals of the op amp are biased at 0.66 V (G = ). Now
the op amp does not have the required 1.5 V headroom and
cannot function. Therefore, the user must increase the supply
voltage or decrease VREF to restore proper operation.
The AD8278 and AD8279 are typically specified at single and
dual supplies, but they can be used with unbalanced supplies as
well; for example, VS = 5 V, +VS = +20 V. The difference between
the two supplies must be kept below 36 V. The positive supply
rail must be at least 2 V above the negative supply.
08
30
8-
0
46
R4
R3
R1
R2
R1
R1 + R2
(VREF)
R1
R1 + R2
(VREF)
VREF
Figure 50. Ensure Sufficient Voltage Headroom on the Internal Op Amp
Inputs
Use a stable dc voltage to power the AD8278 and AD8279. Noise
on the supply pins can adversely affect performance. Place a
bypass capacitor of 0.1 μF between each supply pin and ground,
as close as possible to each supply pin. Use a tantalum capacitor
of 10 μF between each supply and ground. It can be farther
away from the supply pins and, typically, it can be shared by
other precision integrated circuits.
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