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參數(shù)資料
| 型號： | AD8275BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP DIFF R-R LDRIFT 8MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Power Line Monitoring |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 25 V/µs |
| -3db帶寬： | 15MHz |
| 電壓 - 輸入偏移： | 150µV |
| 電流 - 電源： | 1.9mA |
| 電流 - 輸出 / 通道： | 30mA |
| 電壓 - 電源，單路/雙路(±)： | 3.3 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 管件 |
AD8275
Rev. A | Page 12 of 16
POWER SUPPLIES
Use a stable dc voltage to power the AD8275. Noise on the
supply pins can adversely affect performance. Place a bypass
capacitor of 0.1 F between each supply pin and ground, as
close to each pin as possible. A tantalum capacitor of 10 F
should also be used between each supply and ground. It can
be farther away from the AD8275 and typically can be shared
by other precision integrated circuits.
REFERENCE
The reference terminals are used to provide a bias level for the
output. For example, in a single-supply 5 V operation, the
reference terminals can be set so that the output is biased at
2.5 V. This ensures that the output can swing positive or
negative around a 2.5 V level.
Figure 33 and Figure 34 illustrate two different ways to set the
reference voltage. See the Basic Connection section for the
differences between the two settings.
The allowable reference voltage range is a function of the
common-mode input and supply voltages. The REF1 and REF2
pins should not exceed either +VS or VS by more than 0.5 V.
The REFx terminals should be driven by low source impedance
because parasitic resistance in series with REF1 and REF2 can
adversely affect CMRR and gain accuracy.
20k
20k
REF2
REF1
50k
–IN
INCORRECT
CORRECT
07546-
033
7
4
5
6
8
1
2
50k
50k
20k
20k
10k
3
–IN
+IN
REF2
VREF
REF1
–VS
+VS
OUT
SENSE
3
AD8275
7
4
5
6
8
2
50k
10k
3
+IN
VREF
–VS
+VS
OUT
SENSE
AD8275
1
20k
20k
REF2
REF1
50k
–IN
7
4
5
6
8
1
2
50k
50k
20k
20k
10k
3
–IN
+IN
REF2
VREF
REF1
–VS
+VS
OUT
SENSE
AD8275
4
5
6
8
2
50k
10k
3
+IN
VREF
–VS
+VS
OUT
SENSE
AD8275
1
IN
2
50
0k
R
REF1
1
0k
5
+IN
NSE
IN
2
50
0k
R
REF1
1
0k
5
+IN
O
NSE
7
Figure 35. REF1 and REF2 Pin Guidelines
COMMON-MODE INPUT VOLTAGE RANGE
The common-mode voltage range is a function of the input
voltage range of the internal op amp, the supply voltage, and
the reference voltage.
Equation 1 expresses the maximum positive common-mode
voltage range.
VCM_POS ≤ 13.14(+VS) – 7.14(–VS) – 5((REF1 + REF2)/2) – 29.69 (1)
Equation 2 expresses the minimum common-mode voltage
range.
VCM_NEG ≥ 6(–VS) – 5((REF1 + REF2)/2) – 0.11
(2)
The voltage range of the internal op amp varies depending on
temperature. The equations reflect a typical input voltage range
expected common-mode ranges for typical configurations.
Table 5. Expected Common-Mode Voltage Range for Typical
Configurations
+VS (V)1
VREF1 (V)
VREF2 (V)
VCM+ (V)
VCM (V)
5
0
23.5
12.6
5
2.5
0
29.8
6.4
5
4.096
0
25.8
10.4
3.3
0
5.4
8.4
3.3
2.5
0
7.4
6.4
5
11.0
25.1
5
4.096
15.5
20.6
5
3
21.0
15.1
5
2.5
23.5
12.6
5
2.048
25.8
10.4
5
1.25
29.8
6.4
5
0
36.0
0.1
1
–VS = 0 V.
INPUT PROTECTION
The inputs of the AD8275, +IN and IN, are protected by ESD
diodes that clamp 40 V above VS and 40 V below +VS. When
operating on a single +5 V supply, the ESD diode conducts at
input voltages less than 35 V and greater than +40 V.
If the input voltage is expected to exceed the maximum ratings
of the AD8275, use external transorbs. Adding series resistors to
the inputs of the AD8275 is not recommended because the
internal resistor ratios are matched to provide optimal CMRR
and gain accuracy. Adding external series resistors to the input
degrades the performance of the AD8275.
All other pins are protected by ESD diodes that clamp 0.5 V
beyond either supply rail. For example, the voltage range of the
REF1 and REF2 pins on a 5 V supply is 0.5 V to +5.5 V.
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