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| 型號(hào)： | AD8260ACPZ-WP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 30/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VGA DIFF LN 310MA 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 放大器類型： | 可變?cè)鲆?br> |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 730 V/µs |
| -3db帶寬： | 195MHz |
| 電流 - 輸入偏壓： | 200nA |
| 電流 - 電源： | 28.3mA |
| 電流 - 輸出 / 通道： | 310mA |
| 電壓 - 電源，單路/雙路(±)： | 3.3 V ~ 10 V，±3.3 V ~ 5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 托盤 - 晶粒 |
| 配用： | AD8260-EVALZ-ND - BOARD EVAL FOR AD8260 |
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AD8260
Rev. A | Page 7 of 32
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
07192-
002
8
7
6
5
1
4
3
2
29
30
31
32
28
25
26
27
20
17
18
19
21
22
23
24
VPSR
FDBK
PRAI
VMDO
VPOS
TXOP
INP
N
VN
EG
VN
EG
TX
FB
INRN
INRP
INP
P
V
O
CM
14
13
9
12
11
10
15 16
PIN 1
INDICATOR
AD8260
TOP VIEW
(Not to Scale)
VMDO
NOTES
1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS
AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE GROUND PLANE.
THE GROUND PLANE PATTERN SHOULD INCLUDE A PATTERN OF VIAS TO INNER LAYERS.
TXEN
VMDI
VNCM
VPSB
ENBL
VGAP
VGAN
V
NG
R
VPSR
G
NS
3
G
NS
2
G
NS
1
G
NS
0
P
RAO
V
NG
R
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 191
VMDO
VMID Buffer Output. Requires robust ac decoupling with a capacitance of 0.1 F capacitor or greater.
2
TXEN
Driver Enable. Logic threshold = 1.1 V with ±0.2 V hysteresis.
3
VMDI
VMID Input Voltage. Normally decoupled with a 0.1 F capacitor. When pulled to VNCM, the VMID buffer shuts
down. This can be useful when using the part with dual supplies or when an external midpoint generator is used.
4
VNCM
Negative Supply for Bias Cell, VMID Cell, and Logic Inputs. (Ground this pin in applications.)
5
VPSB
Positive Supply for Bias Cell and VMID Cell.
6
ENBL
Enable. Logic threshold = 1.1 V. When low, the AD8260 is disabled and the supply current is 35 A when TXEN
and all GNSx pins are also low.
7
VGAP
Positive VGA Output (Needs to Be Ac-Coupled for Single Supply).
8
VGAN
Negative VGA Output (Needs to Be Ac-Coupled for Single Supply).
9, 161
VNGR
Negative Supply for Preamplifier and DGA (Set to VPOS for Dual Supply; GND for Single Supply).
10, 201
VPSR
Positive Supply for Preamplifier, DGA, and GNSx Logic Decoder.
11
GNS3
MSB for Gain Control. Logic threshold = 1.1 V.
12
GNS2
Gain Control Bit. Logic threshold = 1.1 V.
13
GNS1
Gain Control Bit. Logic threshold = 1.1 V.
14
GNS0
LSB for Gain Control. Logic threshold = 1.1 V.
15
PRAO
Preamplifier Output.
17
FDBK
Negative Input of Preamplifier.
18
PRAI
Positive Input of Preamplifier.
21, 221
VPOS
Positive Supply for Driver Amplifier.
23, 241
TXOP
Driver Output.
25, 261
VNEG
Negative Supply for Driver Amplifier (Set to VPOS for Dual Supply; GND for Single Supply).
27
TXFB
Feedback for Driver Amplifier.
28
INPN
Negative Driver Amplifier Input.
29
INRN
Negative Gain Resistor Input for Driver Amplifier.
30
INRP
Positive Gain Resistor Input for Driver Amplifier.
31
INPP
Positive Driver Amplifier Input.
32
VOCM
Output Common Mode Pin. Normally connected to Pin VMDO.
EPAD
Exposed Pad. The exposed pad is not connected internally. For increased reliability of the solder joints and
maximum thermal capability it is recommended that the pad be soldered to the ground plane. The ground plane
pattern should include a pattern of vias to inner layers.
1 Pins with the same name are connected internally.
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