參數(shù)資料
型號(hào)： AD820BRZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 12/24頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP JFET R-R 1.8MHZ 8SOIC
標(biāo)準(zhǔn)包裝： 750
放大器類(lèi)型： J-FET
電路數(shù)： 1
輸出類(lèi)型： 滿擺幅
轉(zhuǎn)換速率： 3 V/µs
增益帶寬積： 1.9MHz
電流 - 輸入偏壓： 2pA
電壓 - 輸入偏移： 300µV
電流 - 電源： 700µA
電流 - 輸出 / 通道： 20mA
電壓 - 電源，單路/雙路(±)： 5 V ~ 36 V，±2.5 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 帶卷 (TR)
AD820
Rev. H | Page 2 of 24
TABLE OF CONTENTS
REVISION HISTORY
3/11—Rev. G to Rev. H
Changes to Figure 43...................................................................... 18
2/10—Rev. F to Rev. G
Changes to Features Section............................................................ 1
Changes to Open-Loop Gain Parameter....................................... 3
Changes to Input Voltage Parameter ............................................. 9
Updated Outline Dimensions....................................................... 20
11/08—Rev. E to Rev. F
Added 8-Lead MSOP .........................................................Universal
Changes to Features Section, Figure 2 Caption, and General
Description Section.......................................................................... 1
Changes to Settling Time Parameter, Common-Mode Voltage
Range Parameter, and Power Supply Rejection Parameter in
Table 1 ................................................................................................ 3
Changes to Settling Time Parameter, Common-Mode Voltage
Range Parameter, and Power Supply Rejection Parameter in
Table 2 ................................................................................................ 5
Changes to Settling Time Parameter, Common-Mode Voltage
Range Parameter, and Power Supply Rejection Parameter in
Table 3 ................................................................................................ 7
Changes to Table 4............................................................................ 9
Added Thermal Resistance Section ............................................... 9
Added Table 5; Renumbered Sequentially .....................................9
Changes to Figure 26...................................................................... 13
Changes to Figure 27...................................................................... 14
Changed Application Notes Section to Applications
Information Section ....................................................................... 16
Changes to Figure 40, Figure 41, and Figure 42......................... 17
Changes to Figure 44...................................................................... 18
Moved Offset Voltage Adjustment Section................................. 19
Updated Outline Dimensions....................................................... 20
Added Figure 49; Renumbered Sequentially .............................. 21
Changes to Ordering Guide.......................................................... 21
2/07—Rev. D to Rev. E
Updated Format..................................................................Universal
Updated Outline Dimensions....................................................... 21
Changes to the Ordering Guide ................................................... 22
5/02—Rev. C to Rev. D
Change to SOIC Package (R-8) Drawing .................................... 15
Edits to Features.................................................................................1
Edits to Product Description ...........................................................1
Delete Specifications for AD820A-3 V...........................................5
Edits to Ordering Guide ...................................................................6
Edits to Typical Performance Characteristics................................8
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