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| 型號： | AD820AR |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET R-R 1.8MHZ 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 3 V/µs |
| 增益帶寬積： | 1.8MHz |
| -3db帶寬： | 1.9MHz |
| 電流 - 輸入偏壓： | 2pA |
| 電壓 - 輸入偏移： | 400µV |
| 電流 - 電源： | 700µA |
| 電流 - 輸出 / 通道： | 20mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 36 V，±2.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 管件 |
AD820
Rev. H | Page 16 of 24
APPLICATIONS INFORMATION
INPUT CHARACTERISTICS
In the AD820, N-channel JFETs are used to provide a low offset,
low noise, high impedance input stage. Minimum input common-
mode voltage extends from 0.2 V below –VS to 1 V less than
+VS. Driving the input voltage closer to the positive rail causes a
loss of amplifier bandwidth (as can be seen by comparing the
large signal responses shown in Figure 29 and Figure 32) and
increased common-mode voltage error, as illustrated in
The AD820 does not exhibit phase reversal for input voltages
up to and including +VS. Figure 38a shows the response of an
AD820 voltage follower to a 0 V to 5 V (+VS) square wave input.
The input and output are superimposed. The output polarity
tracks the input polarity up to +VS with no phase reversal. The
reduced bandwidth above a 4 V input causes the rounding of
the output waveform. For input voltages greater than +VS, a
resistor in series with the AD820 positive input prevents phase
reversal, at the expense of greater input voltage noise. This is
illustrated in Figure 38b.
Because the input stage uses N-channel JFETs, input current
during normal operation is negative; the current flows out from
the input terminals. If the input voltage is driven more positive
than +VS 0.4 V, the input current reverses direction as internal
device junctions become forward biased. This is illustrated in
A current-limiting resistor should be used in series with the
input of the AD820 if there is a possibility of the input voltage
exceeding the positive supply by more than 300 mV, or if an
input voltage is applied to the AD820 when ±VS = 0 V. The
amplifier can be damaged if left in that condition for more than
10 seconds. A 1 kΩ resistor allows the amplifier to withstand up
to 10 V of continuous overvoltage, and increases the input
voltage noise by a negligible amount.
Input voltages less than VS are a completely different story.
The amplifier can safely withstand input voltages 20 V below
the negative supply voltage as long as the total voltage from
the positive supply to the input terminal is less than 36 V. In
addition, the input stage typically maintains picoamp level
input currents across that input voltage range.
The AD820 is designed for 13 nV/√Hz wideband input voltage
noise and maintains low noise performance to low frequencies
(refer to Figure 14). This noise performance, along with the
AD820 low input current and current noise, means that the
AD820 contributes negligible noise for applications with source
resistances greater than 10 kΩ and signal bandwidths greater
than 1 kHz. This is illustrated in Figure 39.
00873-
039
100
90
10
0%
1V
10s
GND
+VS
100
90
10
0%
1V
2s
GND
AD820
–
+
5V
RP
VOUT
–
+
VIN
–
+
(b)
(a)
Figure 38. (a) Response with RP= 0 Ω; VIN from 0 V to +VS
(b) VIN = 0 V to +VS + 200 mV,
VOUT = 0 V to +VS, RP = 49.9 kΩ
100k
0.1
10k
10G
SOURCE IMPEDANCE (Ω)
IN
P
U
T
V
OLTA
GE
N
OIS
E
(
V
r
m
s
)
00873-
040
10k
1k
100
10
1
100k
1M
10M
100M
1G
WHENEVER JOHNSON NOISE IS GREATER THAN
AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE
CONSIDERED NEGLIGIBLE FOR APPLICATION.
RESISTOR JOHNSON
NOISE
1kHz
10Hz
AMPLIFIER-GENERATED
NOISE
Figure 39. Total Noise vs. Source Impedance
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