參數(shù)資料
型號(hào): AD8145
廠商: Analog Devices, Inc.
英文描述: High Speed, Triple Differential Receiver with Comparators
中文描述: 高速,三差分接收器的比較
文件頁數(shù): 19/24頁
文件大?。?/td> 473K
代理商: AD8145
AD8145
DRIVING A CAPACITIVE LOAD
The AD8145 typically drives either high impedance loads over
short PCB traces, such as crosspoint switch inputs, or doubly
terminated coaxial cables. A gain of 1 is commonly used in the
high impedance case since the 6 dB transmission line termination
loss is not incurred. A gain of 2 is required when driving cables
to compensate for the 6 dB termination loss.
In all cases, the output must drive the parasitic capacitance
of the feedback loop, conservatively estimated to be 1 pF, in
addition to the capacitance presented by the actual load. When
driving a high impedance input, it is recommended that a small
series resistor be used to buffer the input capacitance of the
device being driven. Clearly, the resistor value must be small
enough to preserve the required bandwidth. In the ideal doubly
terminated cable case, the AD8145 output sees a purely resistive
load. In reality, there is some residual capacitance, and this is
buffered by the series termination resistor. Figure 42 illustrates
the high impedance case, and Figure 43 illustrates the cable-
driving case.
POWER-DOWN
The power-down feature is intended to be used to reduce power
consumption when a particular device is not in use, and does
not place the output in a high-Z state when asserted. The
power-down feature is asserted when the voltage applied to the
power-down pin drops to approximately 2 V below the positive
supply. The AD8145 is enabled by pulling the power-down pin
to the positive supply.
Rev. 0 | Page 19 of 24
R
S
C
IN
GAIN
REF
R
R
0.01μF
0.01μF
+5V
–5V
C
OUT
V
IN
V
REF
0
Figure 42. Buffering the Input Capacitance of a High-Z Load with G = 1
GAIN
REF
R
R
0.01μF
0.01μF
+5V
–5V
C
V
REF
V
IN
R
S
C
S
R
L
OUT
0
Figure 43. Driving a Doubly Terminated Cable with G = 2
相關(guān)PDF資料
PDF描述
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AD8153_07 3.2 Gbps Single Buffered Mux/Demux Switch
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