參數(shù)資料
型號: AD8143
廠商: Analog Devices, Inc.
英文描述: High Speed, Triple Differential Receiver with Comparators
中文描述: 高速,三差分接收器的比較
文件頁數(shù): 20/24頁
文件大?。?/td> 412K
代理商: AD8143
AD8143
A diode is a simple example of such a clamp. Schottky diodes
generally have lower clamping voltages than typical signal
diodes. The clamping voltage should be larger than the largest
expected signal amplitude, with enough margin to ensure that
the received signal passes without being distorted.
Rev. 0 | Page 20 of 24
A simple way to implement a clamp is to use a number of
diodes in series. The resultant clamping voltage is then the sum
of the clamping voltages of individual diodes.
A 1N4448 diode has a forward voltage of approximately 0.70 V
to 0.75 V at typical current levels that are seen when it is being
used as a clamp, and 2 pF maximum capacitance at 0 V bias.
(The capacitance of a diode decreases as its reverse bias voltage
is increased.) The series connection of two 1N4448 diodes,
therefore, has a clamping voltage of 1.4 V to 1.5 V. Figure 43
shows how to limit the differential input voltage applied to an
AD8143 amplifier to
±
1.4 V to
±
1.5 V (2.8 V p-p to 3.0 V p-p).
Note that the resulting capacitance of the two series diodes is
half that of one diode. Different numbers of series diodes can be
used to obtain different clamping voltages.
R
T
is the differential termination resistor and the series
resistances, R
S
, limit the current into the diodes. The series
resistors should be highly matched in value to preserve high
frequency CMRR.
POSITIVE CLAMP
NEGATIVE CLAMP
R
S
R
T
V
IN
R
S
+
0
V
OUT
+
Figure 43. Using Two 1N4448 Diodes in Series as a Clamp
There are many other nonlinear devices that can be used as
clamps. The best choice for a particular application depends
upon the desired clamping voltage, response time, parasitic
capacitance, and other factors.
When using external differential-mode clamping, it is
important to ensure that the series resistors (R
S
), the sum of
the parasitic capacitance of the clamping devices, and the input
capacitance of the AD8143 are small enough to preserve the
desired signal bandwidth.
Figure 44 shows a specific example of external common-mode
clamping.
0
+
V
OUT
V+
V+
V–
V–
3
2
1
3
2
1
V
IN
+
R
T
R
S
R
S
HBAT-540C
HBAT-540C
Figure 44. External Common-Mode Clamping
The series resistances, R
S
, limit the current in each leg,
and the Schottky diodes limit the voltages on each input to
approximately 0.3 V to 0.4 V over the positive power supply,
V+ and to 0.3 V to 0.4 V below the negative power supply, V.
The maximum value of R
S
is determined by the required signal
bandwidth, the line impedance, and the effective differential
capacitance due to the AD8143 inputs and the diodes.
As with the differential clamp, the series resistors should be
highly matched in value to preserve high frequency CMRR.
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The two most important issues with regard to printed circuit
board (PCB) layout are minimizing parasitic signal trace
reactances in the feedback network and providing sufficient
thermal relief.
Excessive parasitic reactances in the feedback network cause
excessive peaking in the amplifier’s frequency response and
excessive overshoot in its step response due to a reduction in
phase margin. Oscillation occurs when these parasitic
reactances are increased to a critical point where the phase
margin is reduced to zero. Minimizing these reactances is
important to obtain optimal performance from the AD8143.
When operating at ±12 V power, it is important to pay special
attention to removing heat from the AD8143.
Besides the special layout considerations previously mentioned
and expounded upon in the following sections, general high
speed layout practices must be adhered to when applying the
AD8143. Controlled impedance transmission lines are required
for incoming and outgoing signals, referenced to a ground plane.
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