參數資料
| 型號： | AD8137YR-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 21/33頁 |
| 文件大小： | 0K |
| 描述： | IC AMP DIFF R-R LP 20MA 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | 差分 |
| 電路數： | 1 |
| 輸出類型： | 差分，滿擺幅 |
| 轉換速率： | 450 V/µs |
| -3db帶寬： | 110MHz |
| 電流 - 輸入偏壓： | 500nA |
| 電壓 - 輸入偏移： | 700µV |
| 電流 - 電源： | 3.2mA |
| 電流 - 輸出 / 通道： | 20mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 12 V，± 2.7 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD8137
Rev. E | Page 27 of 32
with the following discussion, provides a good example of how
to provide a proper termination in a 50 environment.
AD8137
+
–
8
2
1
6
3
4
0V
2V p-p
RT
52.3
5
+
–
VOCM
1k
1.02k
1k
1k
0.1
F
0.1
F
+5V
–5V
VIN
SIGNAL
SOURCE
50
04771-0-020
Figure 67. AD8137 with Terminated Input
The 52.3 termination resistor, RT, in parallel with the 1 k
input resistance of the AD8137 circuit, yields an overall input
resistance of 50 that is seen by the signal source. To have
matched feedback loops, each loop must have the same RG if it
has the same RF. In the input (upper) loop, RG is equal to the 1 k
resistor in series with the (+) input plus the parallel combination
of RT and the source resistance of 50 . In the upper loop, RG is
therefore equal to 1.03 k. The closest standard value is 1.02 k
and is used for RG in the lower loop.
Things become more complicated when it comes to determining
the feedback resistor values. The amplitude of the signal source
generator VIN is two times the amplitude of its output signal when
terminated in 50 . Therefore, a 2 V p-p terminated amplitude
is produced by a 4 V p-p amplitude from VS. The Thevenin
equivalent circuit of the signal source and RT must be used when
calculating the closed-loop gain because RG in the upper loop is
split between the 1 k resistor and the Thevenin resistance
looking back toward the source. The Thevenin voltage of the
signal source is greater than the signal source output voltage
when terminated in 50 because RT must always be greater
than 50 . In this case, RT is 52.3 and the Thevenin voltage
and resistance are 2.04 V p-p and 25.6 , respectively.
Now the upper input branch can be viewed as a 2.04 V p-p
source in series with 1.03 k. Because this is to be a unity-gain
application, a 2 V p-p differential output is required, and RF
must therefore be 1.03 k × (2/2.04) = 1.01 k ≈ 1 k.
This example shows that when RF and RG are large compared to RT,
the gain reduction produced by the increase in RG is essentially
cancelled by the increase in the Thevenin voltage caused by RT
being greater than the output resistance of the signal source. In
general, as RF and RG become smaller in terminated applications,
RF needs to be increased to compensate for the increase in RG.
When generating the typical performance characteristics data,
the measurements were calibrated to take the effects of the
terminations on closed-loop gain into account.
Power-Down
The AD8137 features a PD pin that can be used to minimize the
quiescent current consumed when the device is not being used.
PD is asserted by applying a low logic level to Pin 7. The threshold
between high and low logic levels is nominally 1.1 V above the
negative supply rail. See Table 1 to Table 3 for the threshold limits.
The AD8137 PD pin features an internal pull-up network that
enables the amplifier for normal operation. The AD8137 PD
pin can be left floating (that is, no external connection is
required) and does not require an external pull-up resistor to
ensure normal on operation (see Figure 68).
Do not connect the PD pin directly to VS+ in ±5 V applications.
This can cause the amplifier to draw excessive supply current
(see Figure 59) and may induce oscillations and/or stability
issues.
50k
5k
150k
REF A
PD
–VS
+VS
Q1
Q2
04771-
072
Figure 68. PD Pin Circuit
DRIVING AN ADC WITH GREATER THAN 12-BIT
PERFORMANCE
Because the AD8137 is suitable for 12-bit systems, it is desirable
to measure the performance of the amplifier in a system with
greater than 12-bit linearity. In particular, the effective number
of bits (ENOB) is most interesting. The AD7687, 16-bit, 250 KSPS
ADC performance makes it an ideal candidate for showcasing
the 12-bit performance of the AD8137.
For this application, the AD8137 is set in a gain of 2 and driven
single-ended through a 20 kHz band-pass filter, while the output
is taken differentially to the input of the AD7687 (see Figure 69).
This circuit has mismatched RG impedances and, therefore, has a
dc offset at the differential output. It is included as a test circuit to
illustrate the performance of the AD8137. Actual application
circuits should have matched feedback networks.
For an AD7687 input range up to 1.82 dBFS, the AD8137 power
supply is a single 5 V applied to VS+ with VS tied to ground. To
increase the AD7687 input range to 0.45 dBFS, the AD8137
supplies are increased to +6 V and 1 V. In both cases, the VOCM
pin is biased with 2.5 V and the PD pin is left floating. All voltage
supplies are decoupled with 0.1 F capacitors. Figure 70 and
Figure 71 show the performance of the 1.82 dBFS setup and the
0.45 dBFS setup, respectively.
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