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參數(shù)資料
| 型號(hào)： | AD8112JSTZ1 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Audio/Video, 60 MHz, 16 】 8, Gain of +2 Crosspoint Switch |
| 中文描述： | 音頻/視頻，60兆赫，16】8，2交叉點(diǎn)開關(guān)增益 |
| 文件頁數(shù)： | 18/28頁 |
| 文件大?。?/td> | 412K |
| 代理商： | AD8112JSTZ1 |
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AD8112
When calculating on-chip power dissipation, it is necessary to
include the rms current being delivered to the load multiplied
by the rms voltage drop on the AD8112 output devices. The
dissipation of the on-chip, 4 kΩ feedback resistor network
must also be included. For a sinusoidal output, the on-chip
power dissipation due to the load and feedback network can
be approximated by
Rev. 0 | Page 18 of 28
(
)
Ω
+
×
=
k
4
2
,
,
,
RMS
OUTPUT
V
RMS
OUTPUT
RMS
OUTPUT
V
CC
MAX
D
I
AV
P
For nonsinusoidal output, the power dissipation is calculated
by integrating the on-chip voltage drop multiplied by the load
current over one period.
The user can subtract the quiescent current for the Class AB
output stage when calculating the loaded power dissipation.
For each output stage driving a load, subtract a quiescent power
according to
P
D, OUTPUT
= (AV
CC
AV
EE
) × I
O, QUIESCENT
where:
I
O, QUIESCENT
= 0.67 mA.
For each disabled output, the quiescent power supply current
in AV
CC
and AV
EE
drops by approximately 1.25 mA, although
there is a power dissipation in the on-chip feedback resistors if
the disabled output is being driven from an external source.
AGND
QPNP
QNPN
AV
CC
I
O, QUIESCENT
V
OUTPUT
I
OUTPUT
RF
4k
I
O, QUIESCENT
AV
EE
0
Figure 43. Simplified Output Stage
Example
The power supplies of the AD8112 with an ambient temperature
of 70°C and all eight outputs driving 6 V rms into 600 Ω loads
are ±12 V.
1.
Calculate the power dissipation of the AD8112 using
quiescent currents (see the Specifications section).
P
D, QUIESCENT
= (AV
CC
+ I
AVCC
) + (AV
EE
× I
AVEE
) +
(DV
CC
× I
DVCC
)
P
D, QUIESCENT
= (12 V × 54 mA) + (12 V × 54 mA) +
(5 V × 13
mA) = 1.3 W
2.
Calculate the power dissipation from the loads.
P
D, OUTPUT
= (AV
CC
V
OUTPUT, RMS
) × I
OUTPUT, RMS
+
V
OUTPUT2
/
4 kΩ
P
D, OUTPUT
= (12 V 6 V) × 6 V/600 Ω + (6 V)
2
/4 kΩ =
69 mW
There are eight outputs, thus
nP
D, OUTPUT
= 8 × 69 mW = 0.55 W
3.
Subtract quiescent output current for number of loads
(assumes output voltage >> 0.5 V).
P
DQ, OUTPUT
=
(AV
CC
AV
EE
) × I
O, QUIESCENT
P
DQ, OUTPUT
= (12 V (12 V)) × 0.67 mA = 16 mW
There are eight outputs, thus
nP
DQ, OUTPUT
= 8 × 16 mW = 0.13 W
4.
Verify that power dissipation does not exceed the maxi-
mum allowed value.
P
D, ON-CHIP
= P
D, QUIESCENT
+ nP
D, OUTPUT
nP
DQ, OUTPUT
P
D, ON-CHIP
= 1.3 W + 0.55 W
0.13 W = 1.7 W
This power dissipation is below the maximum allowed
dissipation for all ambient temperatures approaching 70°C.
It can be shown that for a dual supply of ±
a
, a Class AB output
stage dissipates maximum power into a grounded load when
the output voltage is a/2. Therefore, for a ±12 V supply, the
previous example demonstrates the worst-case power dissi-
pation into 600 Ω. It can be seen from this example that the
minimum load resistance for ±12 V operation is 600 Ω for
full rated operating temperature range. For larger safety margins
when the output signal is unknown, loads of 1 kΩ and greater
are recommended. When operating with ±5 V supplies, this
load resistance can be lowered to 150 Ω.
SHORT-CIRCUIT OUTPUT CONDITIONS
Although there is short-circuit current protection on the AD8112
outputs, the output current can reach values of 55 mA into a
grounded output. Sustained operation with even one shorted
output will exceed the maximum die temperature and may
result in device failure (see the Absolute Maximum Ratings
section).
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