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參數(shù)資料
| 型號： | AD8099ARDZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Ultralow Distortion, High Speed 0.95 nV/Hz Voltage Noise Op Amp |
| 中文描述： | OP-AMP, 500 uV OFFSET-MAX, PDSO8 |
| 封裝： | LEAD FREE, MS-012, SOIC-8 |
| 文件頁數(shù)： | 5/28頁 |
| 文件大小： | 1208K |
| 代理商： | AD8099ARDZ-REEL |
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AD8099
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Differential Input Voltage
Differential Input Current
Storage Temperature
Operating Temperature Range
Lead Temperature Range (Soldering 10 sec)
Junction Temperature
Rev. B | Page 5 of 28
Rating
12.6 V
See Figure 4
±
1.8 V
±10mA
–65°C to +125°C
–40°C to +125°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8099 package is
limited by the associated rise in junction temperature (T
J
) on
the die. The plastic encapsulating the die will locally reach the
junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic will change its
properties. Even temporarily exceeding this temperature limit
may change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
AD8099. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing failure.
The still-air thermal properties of the package and PCB (θ
JA
),
the ambient temperature (
T
A
), and the total power dissipated in
the package (
P
D
) determine the junction temperature of the die.
The junction temperature can be calculated as
(
JA
D
A
J
θ
P
T
T
×
+
=
)
The power dissipated in the package (
P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (
V
S
) times the
quiescent current (
I
S
). Assuming the load (
R
L
) is referenced to
midsupply, the total drive power is
V
S
/2 × I
OUT
, some of which is
dissipated in the package and some in the load (
V
OUT
× I
OUT
).
The difference between the total drive power and the load
power is the drive power dissipated in the package.
P
D
= Quiescent Power + (Total Drive Power – Load Power)
(
)
L
2
OUT
R
L
OUT
R
S
S
S
D
V
–
V
2
V
I
V
P
×
+
×
=
RMS output voltages should be considered. If
R
L
is referenced to
V
S
–, as in single-supply operation, then the total drive power is
V
S
× I
OUT
. If the rms signal levels are indeterminate, consider the
worst case, when
V
OUT
=
V
S
/4 for
R
L
to midsupply:
(
)
S
S
S
D
R
(
)
L
/
V
I
V
P
2
4
+
×
=
In single-supply operation with
R
L
referenced to
V
S
–, worst case
is
V
OUT
=
V
S
/2.
Airflow will increase heat dissipation, effectively reducing θ
JA
.
Also, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θ
JA
. Soldering the exposed paddle to the ground
plane significantly reduces the overall thermal resistance of the
package. Care must be taken to minimize parasitic capaci-
tances at the input leads of high speed op amps, as discussed in
the PCB Layout section.
Figure 4 shows the maximum safe power dissipation in the
package versus the ambient temperature for the exposed paddle
(e-pad) SOIC-8 (70°C/W), and CSP (70°C/W), packages on a
JEDEC standard 4-layer board. θ
JA
values are approximations.
0
AMBIENT TEMPERATURE (°C)
120
–40
–20
0
20
40
60
80
100
M
0.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
LFCSP AND SOIC
Figure 4. Maximum Power Dissipation
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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