參數(shù)資料
型號(hào): AD8045ARDZ-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 16/25頁(yè)
文件大小: 0K
描述: IC OPAMP VF ULDIST LN 70MA 8SOIC
產(chǎn)品培訓(xùn)模塊: Practical Guide High Speed PCB Layout
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 1350 V/µs
-3db帶寬: 1GHz
電流 - 輸入偏壓: 2µA
電壓 - 輸入偏移: 200µV
電流 - 電源: 16mA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 3.3 V ~ 12 V,±1.65 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm Width)裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 8-SOIC-EP
包裝: 帶卷 (TR)
AD8045
Rev. A | Page 22 of 24
PRINTED CIRCUIT BOARD LAYOUT
Laying out the printed circuit board (PCB) is usually the last
step in the design process and often proves to be one of the
most critical. A brilliant design can be rendered useless because
of a poor or sloppy layout. Since the AD8045 can operate into
the RF frequency spectrum, high frequency board layout con-
siderations must be taken into account. The PCB layout, signal
routing, power supply bypassing, and grounding all must be
addressed to ensure optimal performance.
SIGNAL ROUTING
The AD8045 LFCSP features the new low distortion pinout with
a dedicated feedback pin and allows a compact layout. The
dedicated feedback pin reduces the distance from the output to
the inverting input, which greatly simplifies the routing of the
feedback network.
When laying out the AD8045 as a unity gain amplifier, it is rec-
ommended that a short, but wide, trace between the dedicated
feedback pin and the inverting input to the amplifier be used to
minimize stray parasitic inductance.
To minimize parasitic inductances, ground planes should be
used under high frequency signal traces. However, the ground
plane should be removed from under the input and output pins
to minimize the formation of parasitic capacitors, which
degrades phase margin. Signals that are susceptible to noise
pickup should be run on the internal layers of the PCB, which
can provide maximum shielding.
POWER SUPPLY BYPASSING
Power supply bypassing is a critical aspect of the PCB design
process. For best performance, the AD8045 power supply pins
need to be properly bypassed.
A parallel connection of capacitors from each of the power
supply pins to ground works best. Paralleling different values
and sizes of capacitors helps to ensure that the power supply
pins “see” a low ac impedance across a wide band of frequencies.
This is important for minimizing the coupling of noise into the
amplifier. Starting directly at the power supply pins, the smallest
value and sized component should be placed on the same side
of the board as the amplifier, and as close as possible to the
amplifier, and connected to the ground plane. This process
should be repeated for the next larger value capacitor. It is
recommended for the AD8045 that a 0.1 F ceramic 0508 case
be used. The 0508 offers low series inductance and excellent
high frequency performance. The 0.1 F case provides low
impedance at high frequencies. A 10 F electrolytic capacitor
should be placed in parallel with the 0.1 F. The 10 f capacitor
provides low ac impedance at low frequencies. Smaller values
requirements. Additional smaller value capacitors help to
provide a low impedance path for unwanted noise out to higher
frequencies but are not always necessary.
Placement of the capacitor returns (grounds), where the capaci-
tors enter into the ground plane, is also important. Returning
the capacitors grounds close to the amplifier load is critical for
distortion performance. Keeping the capacitors distance short,
but equal from the load, is optimal for performance.
In some cases, bypassing between the two supplies can help to
improve PSRR and to maintain distortion performance in
crowded or difficult layouts. It is brought to the designer’s
attention here as another option to improve performance.
Minimizing the trace length and widening the trace from the
capacitors to the amplifier reduce the trace inductance. A series
inductance with the parallel capacitance can form a tank circuit,
which can introduce high frequency ringing at the output. This
additional inductance can also contribute to increased distor-
tion due to high frequency compression at the output. The use
of vias should be minimized in the direct path to the amplifier
power supply pins since vias can introduce parasitic inductance,
which can lead to instability. When required, use multiple large
diameter vias because this lowers the equivalent parasitic
inductance.
GROUNDING
The use of ground and power planes is encouraged as a method
of proving low impedance returns for power supply and signal
currents. Ground and power planes can also help to reduce stray
trace inductance and to provide a low thermal path for the
amplifier. Ground and power planes should not be used under
any of the pins of the AD8045. The mounting pads and the
ground or power planes can form a parasitic capacitance at the
amplifiers input. Stray capacitance on the inverting input and
the feedback resistor form a pole, which degrades the phase
margin, leading to instability. Excessive stray capacitance on the
output also forms a pole, which degrades phase margin.
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