參數(shù)資料
型號(hào): AD8038ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 7/17頁
文件大?。?/td> 0K
描述: IC OPAMP VF LP LN LDIST 8SOIC
設(shè)計(jì)資源: AC Signal Processing Using AD5426/32/43 Current Output DACs (CN0037)
AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054)
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 425 V/µs
-3db帶寬: 350MHz
電流 - 輸入偏壓: 400pA
電壓 - 輸入偏移: 500µV
電流 - 電源: 1mA
電壓 - 電源,單路/雙路(±): 3 V ~ 12 V,±1.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD8038/AD8039
Rev. G | Page 14 of 16
APPLICATIONS INFORMATION
LOW POWER ADC DRIVER
8
1
0.1F
10F
0.1F
10F
+5V
7
0.1F
10F
–5V
3
2
6
5
4
AD8039
1k
VINP
VINN
REF
50
AD9203
1k
VIN
0V
3V
2.5V
02
95
1-
04
3
Figure 43. Schematic to Drive AD9203 with the AD8039
The AD9203 is a low power (125 mW on a 5 V supply), 40 MSPS
10-bit converter. As such, the low power, high performance
AD8039 is an appropriate amplifier choice to drive it.
In low supply voltage applications, differential analog inputs
are needed to increase the dynamic range of the ADC inputs.
Differential driving can also reduce second and other even-order
distortion products. The AD8039 can be used to make a dc-
coupled, single-ended-to-differential driver for driving these
ADCs. Figure 43 is a schematic of such a circuit for driving the
AD9203, 10-bit, 40 MSPS ADC.
The AD9203 works best when the common-mode voltage at the
input is at the midsupply or 2.5 V. The output stage design of
the AD8039 makes it ideal for driving these types of ADCs.
In this circuit, one of the op amps is configured in the inverting
mode, and the other is in the noninverting mode. However, to
provide better bandwidth matching, each op amp is configured
for a noise gain of +2. The inverting op amp is configured for a
gain of 1, and the noninverting op amp is configured for a gain
of +2. Each has a very similar ac response. The input signal to
the noninverting op amp is divided by 2 to normalize its voltage
level and make it equal to the inverting output.
The outputs of the op amps are centered at 2.5 V, which is the
midsupply level of the ADC. This is accomplished by first taking
the 2.5 V reference output of the ADC and dividing it by 2 with
a pair of 1 kΩ resistors. The resulting 1.25 V is applied to the
positive input of each op amp. This voltage is then multiplied by
the gain of the op amps to provide a 2.5 V level at each output.
LOW POWER ACTIVE VIDEO FILTER
Some composite video signals derived from a digital source
contain clock feedthrough that can limit picture quality. Active
filters made from op amps can be used in this application, but
they consume 25 mW to 30 mW for each channel. In power-
sensitive applications, this can be too much, requiring the use
of passive filters that can create impedance matching problems
when driving any significant load.
The AD8038 can be used to make an effective low-pass active
filter that consumes one-fifth of the power consumed by an
active filter made from an op amp. Figure 44 shows a circuit
that uses a AD8038 with ±2.5 V supplies to create a three-pole
Sallen-Key filter. This circuit uses a single RC pole in front of a
standard 2-pole active section.
0.1F
+2.5V
10F
–2.5V
0.1F
10F
C3
33pF
R3
49.9
RF
1
680pF
R5
75
R2
499
C1
100pF
R1
200
R4
49.9
AD8038
VIN
VOUT
02951-
044
Figure 44. Low-Pass Filter for Video
Figure 45 shows the frequency response of this filter. The
response is down 3 dB at 6 MHz; therefore, it passes the video
band with little attenuation. The rejection at 27 MHz is 45 dB,
which provides more than a factor of 100 in suppression of the
clock components at this frequency.
FREQUENCY (MHz)
0.1
GA
IN
(
d
B
)
110
–10
10
100
0
–20
–30
–40
–50
–60
02
95
1-
04
5
Figure 45. Video Filter Response
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