R
參數(shù)資料
型號(hào)： AD8030ARZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/25頁(yè)
文件大?。?/td> 0K
描述： IC AMP GP R-R DUAL LP 8SOIC
標(biāo)準(zhǔn)包裝： 98
放大器類型： 通用
電路數(shù)： 2
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 63 V/µs
-3db帶寬： 125MHz
電流 - 輸入偏壓： 1.7µA
電壓 - 輸入偏移： 2000µV
電流 - 電源： 1.4mA
電流 - 輸出 / 通道： 170mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 12 V，±1.35 V ~ 6 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 管件
產(chǎn)品目錄頁(yè)面： 769 (CN2011-ZH PDF)
AD8029/AD8030/AD8040
Data Sheet
Rev. B | Page 18 of 24
Table 5. Effect of Load on Performance
Noninverting
Gain
RF
(k)
RG
(k)
RLOAD
(k)
–3 dB SS BW
(MHz)
Peaking
(dB)
HD2 at 1 MHz,
2 V p-p (dB)
HD3 at 1 MHz,
2 V p-p (dB)
Output Noise
(nV/√Hz)
1
0
N/A
1
120
0.02
–80
–72
16.5
1
0
N/A
2
130
0.6
–84
–83
16.5
1
0
N/A
5
139
1
–87.5
–92.5
16.5
2
1
36
0
–72
–60
33.5
2
2.5
44.5
0.2
–79
–72.5
34.4
2
5
43
2
–84
–86
36
–1
1
40
0.01
–68
–57
33.6
–1
2.5
40
0.05
–74
–68
34
–1
5
34
1
–78
–80
36
The feedback resistance (RF || RG) combines with the input
capacitance to form a pole in the amplifier’s loop response. This
can cause peaking and ringing in the amplifier’s response if the
RC time constant is too low. Figure 55 illustrates this effect.
Peaking can be reduced by adding a small capacitor (1 pF–4 pF)
across the feedback resistor. The best way to find the optimal
value of capacitor is to empirically try it in your circuit. Another
factor of higher resistance values is the impact it has on noise
performance. Higher resistor values generate more noise. Each
application is unique and therefore a balance must be reached
between distortion, peaking, and noise performance. Table 5
outlines the trade-offs that different loads have on distortion,
peaking, and noise performance. In gains of 1, 2, and 10,
equivalent loads of 1 k, 2 k, and 5 k are shown.
With increasing load resistance, the distortion and –3 dB
bandwidth improve, while the noise and peaking degrade
slightly.
RL = 5k
FREQUENCY (MHz)
NORMALIZED
CLOSED-LOOP
GAIN
(dB)
1
–8
10
100
1000
03679-A-007
2
1
0
–1
–2
–3
–4
–5
–6
RL = 2.5k
–7
RF = RL = 5k
RF = RL = 2.5k
RF = RL = 1k
G = +2
G = +1
RL = 1k
VS = 5V
VOUT = 0.1V p-p
Figure 55. Frequency Response for Various Feedback/Load Resistances
DISABLE PIN
The AD8029 disable pin allows the amplifier to be shut down
for power conservation or multiplexing applications. When in
the disable mode, the amplifier draws only 150 A of quiescent
current. The disable pin control voltage is referenced to the
negative supply. The amplifier enters power-down mode any
time the disable pin is tied to the most negative supply or within
0.8 V of the negative supply. If left open, the amplifier will
operate normally. For switching levels, refer to Table 6.
Table 6. Disable Pin Control Voltage
Disable Pin
Voltage
Supply Voltage
+3 V
+5 V
±5 V
Low
(Disabled)
0 V to <0.8 V
–5 V to <–4 .2 V
High
(Enabled)
1.2 V to 3 V
1.2 V to 5 V
–3.8 V to +5 V
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