參數資料
| 型號： | AD8029ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 10/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP GP R-R LP 170MA 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | 通用 |
| 電路數： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 63 V/µs |
| -3db帶寬： | 125MHz |
| 電流 - 輸入偏壓： | 1.7µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 1.4mA |
| 電流 - 輸出 / 通道： | 170mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 12 V，±1.35 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
Data Sheet
AD8029/AD8030/AD8040
Rev. B | Page 17 of 24
APPLICATIONS
WIDEBAND OPERATION
+VS
–VS
C2
10
F
C1
0.1
F
C4
0.1
F
C3
10
F
VOUT
+
–
AD8029
RG
R1
RF
DISABLE
VIN
R1 = RF||RG
03679-0-052
Figure 51. Wideband Non-inverting Gain Configuration
+VS
–VS
C1
0.1
F
C4
0.1
F
C3
10
F
R1
VOUT
–
+
AD8029
RG
R1 = RF||RG
RF
VIN
03679-0-053
C2
10
F
DISABLE
Figure 52. Wideband Inverting Gain Configuration
OUTPUT LOADING SENSITIVITY
To achieve maximum performance and low power dissipation,
the designer needs to consider the loading at the output of
AD8029/AD8030/AD8040. Table 5 shows the effects of output
loading and performance.
When operating at unity gain, the effective load at the amplifier
output is the resistance (RL) being driven by the amplifier. For
gains other than 1, in noninverting configurations, the feedback
network represents an additional current load at the amplifier
output. The feedback network (RF + RG) is in parallel with RL,
which lowers the effective resistance at the output of the
amplifier. The lower effective resistance causes the amplifier to
supply more current at the output. Lower values of feedback
resistance increase the current draw, thus increasing the
amplifier’s power dissipation.
For example, if using the values shown in Table 5 for a gain of 2,
with resistor values of 2.5 k, the effective load at the output is
1.67 k. For inverting configurations, only the feedback resistor
RF is in parallel with the output load. If the load is greater than
that specified in the data sheet, the amplifier can introduce
nonlinearities in its open-loop response, which increases
distortion. Figure 53 and Figure 54 illustrate effective output
loading and distortion performance. Increasing the resistance of
the feedback network can reduce the current consumption, but
has other implications.
FREQUENCY (MHz)
HARMONIC
DISTORTION
(dBc)
0.01
–120
0.1
1.0
10
03679-A-008
–40
–50
–60
–70
–80
–90
–100
–110
VS = 5V
VOUT = 0.1V p-p
RL = 5k
RL = 2.5k
VS = 5V
VOUT = 2.0V p-p
SECOND HARMONIC – SOLID LINES
THIRD HARMONIC – DOTTED LINES
RL = 1k
Figure 53. Gain of 1 Distortion
FREQUENCY (MHz)
HARMONIC
DISTORTION
(dBc)
0.01
–120
0.1
1.0
10
03679-A-009
–40
–50
–60
–70
–80
–90
–100
–110
VS = 5V
VOUT = 0.1V p-p
RF = RL = 1k
VS = 5V
VOUT = 2.0V p-p
SECOND HARMONIC – SOLID LINES
THIRD HARMONIC – DOTTED LINES
RF = RL = 5k
RF = RL = 2.5k
Figure 54. Gain of 2 Distortion
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