參數(shù)資料
型號: AD8027ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 23/25頁
文件大?。?/td> 0K
描述: IC OPAMP R-R LDIST LN LP 8SOIC
標準包裝: 1,000
放大器類型: 電壓反饋
電路數(shù): 1
輸出類型: 滿擺幅
轉換速率: 100 V/µs
-3db帶寬: 190MHz
電流 - 輸入偏壓: 4µA
電壓 - 輸入偏移: 200µV
電流 - 電源: 6.5mA
電流 - 輸出 / 通道: 120mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V,±1.35 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SO
包裝: 帶卷 (TR)
AD8027/AD8028
Rev. C | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
Supply Voltage
12.6 V
Power Dissipation
Common-Mode Input Voltage
±VS ± 0.5 V
Differential Input Voltage
±1.8 V
Storage Temperature
–65°C to +125°C
Operating Temperature Range
–40°C to +125°C
Lead Temperature Range
(Soldering 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8027/AD8028
package is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die locally reaches
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8027/AD8028.
Exceeding a junction temperature of 175°C for an extended
period of time can result in changes in the silicon devices,
potentially causing failure.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
(
)
JA
D
A
J
θ
P
T
×
+
=
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, then the total drive power is VS/2 × IOUT, some of
which is dissipated in the package and some in the load (VOUT ×
IOUT). The difference between the total drive power and the load
power is the drive power dissipated in the package.
PD = Quiescent Power + (Total Drive Power Load Power)
()
L
OUT
L
OUT
S
D
R
V
R
V
I
V
P
2
2
×
+
×
=
RMS output voltages should be considered. If RL is referenced
to VS, as in single-supply operation, then the total drive power
is VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case, when VOUT = VS/4 for RL to midsupply.
() (
)
L
S
D
R
V
I
V
P
2
4
/
+
×
=
In single-supply operation with RL referenced to VS–, worst case
is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA. Also,
more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes reduces
the θJA. Care must be taken to minimize parasitic capacitances
at the input leads of high speed op amps, as discussed in the
PCB Layout section.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
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