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參數(shù)資料
| 型號： | AD7942BCPRL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 250 kSPS PulSAR ADC in MSOP/QFN |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, DSO10 |
| 封裝： | 3 X 3 MM, QFN-10 |
| 文件頁數(shù)： | 18/28頁 |
| 文件大?。?/td> | 633K |
| 代理商： | AD7942BCPRL7 |
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Preliminary Technical Data
AD7942
Rev Pr B | Page 25 of 28
APPLICATION HINTS
LAYOUT
The printed circuit board that houses the AD7942 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. The pinout of the
AD7942 with all its analog signals on the left side and all its
digital signals on the right side eases this task.
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7942 is used as a shield. Fast switching signals, such as CNV
or clocks, should never run near analog signal paths. Crossover
of digital and analog signals should be avoided
At least one ground plane should be used. It could be common
or split between the digital and analog section. In such a case, it
should be joined underneath the AD7942s.
The AD7942 voltage reference input REF has a dynamic input
impedance and should be decoupled with minimal parasitic
inductances. That is done by placing the reference decoupling
ceramic capacitor close to, and ideally right up against, the REF
and GND pins and connect these pins with wide, low
impedance traces.
Finally, the power supply VDD and VIO of the AD7942 should
be decoupled with ceramic capacitors, typically 100 nF, placed
close to the AD7942 and connected using short and large traces
to provide low impedance paths and reduce the effect of glitches
on the power supply lines.
An example of layout following these rules is shown in Figure
EVALUATING THE AD7942’S PERFORMANCE
Other recommended layouts for the AD7942 are outlined in the
evaluation board for the AD7942 (EVAL-AD7942). The
evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from a PC via the EVAL-CONTROL BRD2.
Figure 41. Example of Layout of the AD7942 (Top Layer)
Figure 42. Example of Layout of the AD7942 (Bottom Layer)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7942BCPWP | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR ADC in MSOP/QFN |
| AD7942BCPZRL | 功能描述:IC ADC 14BIT SAR 250KSPS 10LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據采集 - 模數(shù)轉換器 系列:PulSAR® 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據接口:串行 轉換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7942BCPZRL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/QFN |
| AD7942BCPZRL7 | 功能描述:IC ADC 14BIT 250KSPS 10-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據采集 - 模數(shù)轉換器 系列:PulSAR® 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據接口:并聯(lián) 轉換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7942BCPZRL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/QFN |
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