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參數(shù)資料
| 型號： | AD7921ARM-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 2-Channel, 2.35 V to 5.25 V 250 kSPS, 10-/12-Bit ADCs |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | MO-187AA, MSOP-8 |
| 文件頁數(shù)： | 10/28頁 |
| 文件大小： | 312K |
| 代理商： | AD7921ARM-REEL7 |
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AD7911/AD7921
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
8-LEAD TSOT
Rev. 0 | Page 10 of 28
0
V
IN1
V
IN0
GND
V
DD
8
7
6
5
DIN
1
SCLK
2
CS
3
DOUT
4
AD7911/
AD7921
TOP VIEW
(Not to Scale)
Figure 8. 8-Lead TSOT Pin Configuration
0
V
DD
GND
V
IN0
V
IN1
8
7
6
5
DOUT
1
CS
2
SCLK
3
DIN
4
AD7911/
AD7921
TOP VIEW
(Not to Scale)
8-LEAD MSOP
Figure 9. 8-Lead MSOP Pin Configuration
Table 5. Pin Function Descriptions
TSOT
Pin No.
Pin No.
1
4
MSOP
Mnemonic Function
DIN
Data In. Logic input. The channel to be converted is provided on this input and is clocked into an
internal register on the falling edge of SCLK.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the AD7911/AD7921’s conversion process.
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7911/AD7921 and framing the serial data transfer.
Data Out. Logic output. The conversion result from the AD7911/AD7921 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK signal.
For the AD7921, the data stream consists of two leading zeros; the channel identifier bit, which
identifies the channel that the conversion result corresponds to; followed by an invalid bit that
matches up to the channel identifier bit; followed by the 12 bits of conversion data, with MSB first.
For the AD7911, the data stream consists of two leading zeros; the channel identifier bit, which
identifies the channel that the conversion result corresponds to; followed by an invalid bit that
matches up to the channel identifier bit; followed by the 10 bits of conversion data, with MSB first and
two trailing zeros.
Power Supply Input. The V
DD
range for the AD7911/AD7921 is from 2.35 V to 5.25 V.
Analog Ground. Ground reference point for all circuitry on the AD7911/AD7921. All analog input
signals should be referred to this GND voltage.
Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip track-
and-hold amplifier. The analog input channel to be converted is selected by writing to the third MSB
on the DIN pin. The input range is 0 to V
DD
.
2
3
SCLK
3
2
CS
4
1
DOUT
5
6
8
7
V
DD
GND
7, 8
6, 5
V
IN0
, V
IN1
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