- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10101 > AD7880BN (Analog Devices Inc)IC ADC 12BIT MONO LP 24-DIP PDF資料下載
參數(shù)資料
| 型號： | AD7880BN |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT MONO LP 24-DIP |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 66k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 50mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 24-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極 |
AD7880
REV. 0
–5–
+
–
R
V
INA
V
INB
R
V
DAC
Figure 4. AD7880 Input Circuit
The AD7880 accommodates three separate input ranges, 0 to
VREF, 0 to 2 VREF and
±V
REF. The input configurations corre-
sponding to these ranges are shown in Figures 5, 6 and 7.
With VREF = VDD and using a nominal VDD of +5 V, the input
ranges are 0 V to 5 V, 0 V to 10 V and +5 V, as shown in
Table II.
Table II. Analog Input Ranges
Analog Input
Input Connections
Connection
Range
VREF
VINA
VINB
Diagram
0 V to +5 V
VDD
VIN
Figure 5
0 V to +10 V
VDD
VIN
AGND
Figure 6
±5 V
VDD
VIN
VREF
Figure 7
+
–
R
SAMPLING
COMPARATOR
V
INA
V
INB
V
REF
AGND
12-BIT DAC
0 TO V
REF
V
REF
= 0 TO V
REF
V
IN
Figure 5. 0 to VREF Unipolar Input Configuration
+
–
R
SAMPLING
COMPARATOR
V
INA
V
INB
V
REF
AGND
12-BIT DAC
0 TO V
REF
V
REF
= 0 TO 2V
REF
V
IN
Figure 6. 0 to 2 VREF Unipolar Input Configuration
+
–
R
SAMPLING
COMPARATOR
V
INA
V
INB
V
REF
AGND
12-BIT DAC
0 TO V
REF
V
REF
= V
REF
V
IN
±
Figure 7.
±V
REF Bipolar Input Configuration
CIRCUIT INFORMATION
The AD7880 is a +5 V single supply 12-bit A/D converter. The
part requires no external components apart from a 2.5 MHz ex-
ternal clock and power supply decoupling capacitors. It contains
a 12-bit successive approximation ADC based on a fast-settling
voltage-output DAC, a high speed comparator and SAR, as well
as the necessary control logic. The charge balancing comparator
used in the AD7880 provides the user with an inherent track-
and-hold function. The ADC is specified to work with sampling
rates up to 66 kHz.
CONVERTER DETAILS
The AD7880 conversion cycle is initiated on the rising edge of
the CONVST pulse, as shown in the timing diagram of Figure
1. The rising edge of the CONVST pulse places the track/hold
amplifier into “HOLD” mode. The conversion cycle then takes
between 26 and 28 clock periods. The maximum specified con-
version time is 12
s. This corresponds to a conversion cycle
time of 28 clock periods with a CLKIN frequency of 2.5 MHz
and also includes internal propagation delays. During conver-
sion the BUSY output will remain low, and the output databus
drivers will be three-stated. When a conversion is completed,
the BUSY output will go to a high level, and the result of the
conversion can be read by bringing CS and RD low.
The track/hold amplifier acquires a 12-bit input signal in 3
s.
The overall throughput time for the AD7880 is equal to the
conversion time plus the track/hold acquisition time. For a
2.5 MHz input clock the throughput time is 15
s.
REFERENCE INPUT
For specified performance, it is recommended that the reference
input be tied to VDD. The part, however, will operate with a ref-
erence down to 2.5 V though with reduced performance specifi-
cations. Figure 3 shows a graph of signal-to-noise ratio (SNR)
versus VREF.
VREF must not be allowed to go above VDD by more than
100 mV.
74
72
70
68
66
64
62
60
234
5
V
REF – Volts
SNR
–
dBs
F = 51.2kHz
S
F = 2.525kHz
IN
T = 25 C
A
Figure 3. SNR vs. VREF
ANALOG INPUT
The AD7880 has two analog input pins, VINA and VINB. Figure
4 shows the input circuitry to the ADC sampling comparator.
The on-board attenuator network, made up of equal resistors,
allows for various input ranges.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72V205L15PFI8 | IC FIFO SYNC 16KX9 15NS 64QFP |
| LT1032ISW#TRPBF | IC LINE DRIVR LOWPWR QUAD 16SOIC |
| LT1032ISW#TR | IC LINE DRIVER QUAD LP 16SOIC |
| IDT72V205L15PFGI8 | IC FIFO SYNC 16KX9 15NS 64QFP |
| IDT72V205L10PFG8 | IC FIFO SYNC 16KX9 10NS 64QFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7880BNZ | 功能描述:IC ADC 12BIT MONO LOW PWR 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7880BQ | 制造商:Analog Devices 功能描述:ADC Single SAR 66ksps 12-bit Parallel 24-Pin CDIP 制造商:Analog Devices 功能描述:ADC SGL SAR 66KSPS 12-BIT PARALLEL 24CDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD7880BR | 功能描述:IC ADC 12BIT LC2MOS 5V LP 24SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7880BR-REEL | 功能描述:IC ADC 12BIT MONO LP 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7880BRZ | 功能描述:IC ADC 12BIT MONO LP 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。