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參數(shù)資料
| 型號： | AD7880 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Enclosed Switches Series LS: Rod - Adjustable; 1NC 1NO DPDT Snap Action, Double Break; 0.5 in - 14NPT conduit; Plug-in |
| 中文描述： | LC2MOS單5伏電源，低功耗，12位采樣ADC |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 337K |
| 代理商： | AD7880 |
AD7880
REV. 0
–3–
TIMNGCHARACTERISTICS
1
Limit at +25
8
C
(All Versions)
50
130
0
0
0
60
57
5
50
Limit at T
MIN
, T
MAX
(All Versions)
50
130
0
0
0
75
70
5
50
Parameter
t
1
t
2
t
3
t
4
t
5
t
6
t
72
t
83
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns max
Conditions/Comments
CONVST
Pulse Width
CONVST
to
BUSY
Falling Edge
BUSY
to
CS
Setup T ime
CS
to
RD
Setup T ime
CS
to
RD
Hold T ime
RD
Pulse Width
Data Access T ime after
RD
Bus Relinquish T ime after
RD
NOT ES
1
T iming specifications in
bold
print are 100% production tested. All other times are sample tested at +25
°
C to ensure compliance. All input signals are specified with
tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2
t
7
is measured with the load circuit of Figure 2 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3
t
is derived from the measured time taken by the data outputs to change by 0.5 V when loaded with the circuit of Figure 2. T he measured number is then extrapo-
lated back to remove the effects of charging the 50 pF capacitor. T his means that the time, t
8
, quoted in the timing characteristics is the true bus relinquish time of
the part and as such is independent of external bus loading capacitances.
(V
DD
= +5 V
6
5%, V
REF
= V
DD
, AGND = DGND = 0 V)
T able I. T ruth T able
CS
CONVST
RD
Function
1
1
0
0
1
j
1
1
X
1
0
1
Not Selected
Start Conversion
g
Enable ADC Data
Data Bus T hree Stated
ABSOLUT E MAX IMUM RAT INGS*
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
V
INA
, V
INB
to AGND (Figure 5) . . . . . . –0.3 V to V
DD
+ 0.3 V
V
INA
to AGND (Figure 6) . . . . . . . . . –0.6 V to 2 V
DD
+ 0.6 V
V
INA
to AGND (Figure 7) . . . . . –V
DD
– 0.3 V to V
DD
+ 0.3 V
V
REF
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to V
DD
Digital Inputs to DGND . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Outputs to DGND . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating T emperature Range
Industrial (B, C Versions) . . . . . . . . . . . . . –40
°
C to +85
°
C
Storage T emperature Range . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . . +300
°
C
Power Dissipation (Any Package) to +75
°
C . . . . . . . . 450 mW
Derates above +75
°
C by . . . . . . . . . . . . . . . . . . . . . 10 mW/
°
C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7880 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
DB0 – DB11
DATA
VALID
t
1
t
CONVERT
t
2
t
3
t
4
t
5
t
6
t
7
t
8
CONVST
BUSY
CS
RD
THREE-STATE
TRACK/HOLD
GOES INTO HOLD
Figure 1. Timing Diagram
TO OUTPUT
PIN
1.6mA
2.1V
+
200μA
50pF
Figure 2. Load Circuit for Access and Relinquish Time
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