參數(shù)資料
型號(hào)： AD7876
廠商： Analog Devices, Inc.
英文描述： Complete, 12-Bit, 100 kHz, Sampling ADCs(LC2MOS 12位100kHz采樣A/D轉(zhuǎn)換器)
中文描述： 完整的，12位，100千赫采樣ADC（LC2MOS 12位100kHz的采樣的A / D轉(zhuǎn)換器）
文件頁(yè)數(shù)： 7/20頁(yè)
文件大小： 346K
代理商： AD7876
REV. B
2
AD7870/AD7875/AD7876
–7–
to the conversion time plus the track/hold amplifier
acquisition time. For a 2.5 MHz input clock the throughput
rate is 10
μ
s max.
T he operation of the track/hold is essentially transparent to the
user. T he track/hold amplifier goes from its tracking mode to its
hold mode at the start of conversion. If the
CONVST
input is
used to start conversion then the track to hold transition occurs
on the rising edge of
CONVST
. If
CS
starts conversion, this
transition occurs on the falling edge of
CS
.
ANALOG INPUT
T he three parts differ from each other in the analog input volt-
age range that they can handle. T he AD7870 accepts
±
3 V
input signals, the AD7876 accepts a
±
10 V input range, while
the input range for the AD7875 is 0 V to +5 V.
Figure 5a shows the AD7870 analog input. T he analog input
range is
±
3 V into an input resistance of typically 15 k
. T he
designed code transitions occur midway between successive
integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . .
FS–3/2 LSBs). T he output code is twos complement binary
with 1 LSB = FS/4096 = 6 V/4096 = 1.46 mV. T he ideal input/
output transfer function is shown in Figure 6.
Figure 5a. AD7870 Analog Input
T he AD7876 analog input structure is shown in Figure 5b. T he
analog input range is
±
10 V into an input resistance of typically
33 k
. As before, the designed code transitions occur midway
between successive integer LSB values. T he output code is 2s
complement with 1 LSB = FS/4096 = 20 V/4096 = 4.88 mV.
T he ideal input/output transfer function is shown in Figure 6.
Figure 5b. AD7876 Analog Input
Figure 5c shows the analog input for the AD7875. T he input
range is 0 V to +5 V into an input resistance of typically 25 k
.
Once again, the designed code transitions occur midway
between successive integer LSB values. T he output code is
CONVE RT E R DE T AILS
T he AD7870/AD7875/AD7876 is a complete 12-bit A/D con-
verter, requiring no external components apart from power
supply decoupling capacitors. It is comprised of a 12-bit suc-
cessive approximation ADC based on a fast settling voltage
output DAC, a high speed comparator and SAR, a track/hold
amplifier, a 3 V buried Zener reference, a clock oscillator and
control logic.
INT E RNAL RE FE RE NCE
T he AD7870/AD7875/AD7876 has an on-chip temperature
compensated buried Zener reference that is factory trimmed to
3 V
±
10 mV. Internally it provides both the DAC reference
and the dc bias required for bipolar operation (AD7870 and
AD7876). T he reference output is available (REF OUT ) and
capable of providing up to 500
μ
A to an external load.
T he maximum recommended capacitance on REF OUT for
normal operation is 50 pF. If the reference is required for use
external to the ADC, it should be decoupled with a 200
resistor in series with a parallel combination of a 10
μ
F tanta-
lum capacitor and a 0.1
μ
F ceramic capacitor. T hese decoupling
components are required to remove voltage spikes caused by
the ADC’s internal operation.
Figure 3. Reference Circuit
T he reference output voltage is 3 V. For applications using the
AD7875 or AD7876, a 5 V or 10 V reference may be required.
Figure 4 shows how to scale the 3 V REF OUT voltage to pro-
vide either a 5 V or 10 V external reference.
Figure 4. Generating a 5 V or 10 V Reference
T RACK -AND-HOLD AMPLIFIE R
T he track-and-hold amplifier on the analog input of the AD7870/
AD7875/AD7876 allows the ADC to accurately convert input
frequencies to 12-bit accuracy. T he input bandwidth of the
track/hold amplifier is much greater than the Nyquist rate of the
ADC even when the ADC is operated at its maximum through-
put rate. T he 0.1 dB cutoff frequency occurs typically at 500
kHz. T he track/hold amplifier acquires an input signal to 12-bit
accuracy in less than 2
μ
s. T he overall throughput rate is equal
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