- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373922 > AD7875BQ (ANALOG DEVICES INC) LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs PDF資料下載
參數(shù)資料
| 型號： | AD7875BQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP24 |
| 封裝： | 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-24 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 331K |
| 代理商： | AD7875BQ |
REV. B
AD7870/AD7875/AD7876
–10–
Figure 10. Mode 1 Timing Diagram, Byte or Serial Read
its
BUSY
function.
BUSY
goes low at the start of conversion,
stays low during the conversion and returns high when the con-
version is complete. It is normally used in parallel interfaces to
drive the microprocessor into a WAIT state for the duration of
conversion.
Figure 11 shows the Mode 2 timing diagram for the 12-bit par-
allel data output format (12/
8
/CLK = +5 V). In this case, the
ADC behaves like slow memory. T he major advantage of this
interface is that it allows the microprocessor to start conversion,
WAIT and then read data with a single READ instruction. T he
user does not have to worry about servicing interrupts or ensur-
ing that software delays are long enough to avoid reading during
conversion.
Figure 11. Mode 2 Timing Diagram, 12-Bit Parallel Read
T he Mode 1 timing diagram for byte and serial data is shown in
Figure 10.
INT
goes low at the end of conversion and is reset
high by the first falling edge of
CS
and
RD
. T his first read at the
end of conversion can either access the low byte or high byte of
data depending on the status of HBEN (Figure 10 shows low
byte only for example). T he diagram shows both a noncontinu-
ously and a continuously running clock (dashed line).
MODE 2 INT E RFACE
T he second interface mode is achieved by hard wiring
CONVST
low and conversion is initiated by taking
CS
low while HBEN is
low. T he track/hold amplifier goes into the hold mode on the
falling edge of
CS
. In this mode, the
BUSY
/
INT
pin assumes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7875CQ | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7875KN | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7875KP | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7875LN | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7875LP | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7875CQ | 功能描述:IC ADC 12BIT SAMPLING 5V 24CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| AD7875KN | 功能描述:IC ADC 12BIT LC2MOS 100KHZ 24DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7875KNZ | 功能描述:IC ADC 12BIT LC2MOS 100KHZ 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7875KNZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7875KP | 功能描述:IC ADC 12BIT SAMPLING 5V 28PLCC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。