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參數(shù)資料
| 型號： | AD7874 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System(LC2MOS 4通道,12位同時采樣DAS) |
| 中文描述： | 4通道，12位同時采樣數(shù)據(jù)采集系統(tǒng)（LC2MOS 4通道，12位同時采樣DAS）的 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 427K |
| 代理商： | AD7874 |
AD7874
REV. C
–3–
TIMNGCHARACTERISTICS
1
Parameter
A, B Versions
S Version
Units
Conditions/Comments
t
1
t
2
t
3
t
4
t
5
t
62
t
73
50
0
60
0
60
57
5
45
130
31
32.5
31
35
10
50
0
70
0
60
70
5
50
150
31
32.5
31
35
10
ns min
ns min
ns min
ns min
ns max
ns max
ns min
ns max
ns min
μ
s min
μ
s max
μ
s min
μ
s max
μ
s max
CONVST
Pulse Width
CS
to
RD
Setup T ime
RD
Pulse Width
CS
to
RD
Hold T ime
RD
to
INT
Delay
Data Access T ime after
RD
Bus Relinquish T ime after
RD
t
8
t
CONV
Delay T ime between Reads
CONVST
to
INT
, External Clock
CONVST
to
INT
, External Clock
CONVST
to
INT
, Internal Clock
CONVST
to
INT
, Internal Clock
Minimum Input Clock Period
t
CLK
NOT ES
1
T iming Specifications in
bold print
are 100% production tested. All other times are sample tested at +25
°
C to ensure compliance. All input signals are specified with
tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2
t
6
is measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3
t
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 2. T he measured number is then extrapolated
back to remove the effects of charging or discharging the 50 pF capacitor. T his means that the time, t
7
, quoted in the timing characteristics is the true bus relinquish
time of the part and as such is independent of external bus loading capacitances.
Specifications subject to change without notice.
(V
DD
= +5 V
6
5%, V
SS
= –5 V
6
5%, AGND = DGND = OV, t
CLK
= 2.5 MHz external unless
otherwse noted.)
ABSOLUT E MAX IMUM RAT INGS*
(T
A
= +25
°
C unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V
AGND to DGND . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
V
IN
to AGND . . . . . . . . . . . . . . . . . . . . . . . . .–15 V to +15 V
REF OUT to AGND . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
DD
Digital Inputs to DGND . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Outputs to DGND . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating T emperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40
°
C to +85
°
C
Extended (S Version) . . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . +300
°
C
Power Dissipation (Any Package) to +75
°
C . . . . . . 1,000 mW
Derates above +75
°
C by . . . . . . . . . . . . . . . . . . . . 10 mW/
°
C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
TO OUTPUT
PIN
1.6mA
2.1V
+
200
μ
A
50pF
Figure 1. Load Circuit for Access Time
TO OUTPUT
PIN
1.6mA
2.1V
+
200
μ
A
50pF
Figure 2. Load Circuit for Bus Relinquish Time
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7874 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
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| AD7874ANZ | 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
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