(VDD = +5 V 5%, V
參數(shù)資料
型號： AD7872KRZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 9/16頁
文件大?。?/td> 0K
描述： IC ADC 14BIT SAMPLING 16SOIC
標準包裝： 1,000
位數(shù)： 14
采樣率（每秒）： 83k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 95mW
電壓電源： 雙 ±
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應商設備封裝： 16-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個單端，雙極
REV. D
–2–
AD7871/AD7872–SPECIFICATIONS
(VDD = +5 V
5%, VSS = –5 V
5%, AGND = DGND =
O V, fCLK = 2 MHz external, fSAMPLE = 83 kHz unless otherwise
noted.) All Specifications TMIN to TMAX unless otherwise noted.
J, A
K
T, B
Parameter
Versions
1 Version1 Versions1 Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio
3 (SNR) @ +25
°C
80
79
dB min
VIN = 10 kHz Sine Wave
TMIN to TMAX
80
79
dB min
SNR is Typically 82 dB for <VIN<41.5 kHz;
Total Harmonic Distortion (THD)
–86
–88
dB max
VIN = 10 kHz Sine Wave
–85
dB typ
Peak Harmonic or Spurious Noise
–86
–88
dB max
VIN = 10 kHz.
–85
dB typ
Intermodulation Distortion (IMD)
Second Order Terms
–86
–88
dB max
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
–85
dB typ
Third Order Terms
–86
–88
dB max
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
–85
dB typ
Track/Hold Acquisition Time
2
s max
DC ACCURACY
Resolution
14
Bits
Minimum Resolution for Which
No Missing Codes Are Guaranteed
14
Bits
Integral Nonlinearity @ +25
°C
±1/2
LSB typ
Integral Nonlinearity
±1
LSB max
Bipolar Zero Error
±12
LSB max
Positive Gain Error
4
±12
LSB max
Negative Gain Error
4
±12
LSB max
ANALOG INPUT
Input Voltage Range
±3
Volts
Input Current
±500
A max
REFERENCE OUTPUT
REF OUT @ +25
°C
2.99/3.01
V min/V max
TMIN to TMAX
2.98/3.02
V min/V max
REF OUT Tempco
±40
ppm/
°C max
Typically 35 ppm
Reference Load Sensitivity
(
REF OUT/I)
±1.2
mV max
Reference Load Current Change (0
A–300 A);
Reference Load Should Not Be Changed During
Conversion
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
VDD = 5 V ± 5%
Input Low Voltage, VINL
0.8
V max
VDD = 5 V ± 5%
Input Current, IIN
±10
A max
VIN = 0 V to VDD
Input Current (14/
8/CLK Input Only)
±10
A max
VIN = VSS to VDD
Input Capacitance, CIN
5
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
4.0
V min
ISOURCE = 40 A
Output Low Voltage, VOL
0.4
V max
ISINK = 1.6 mA
DB13 – DB0
Floating-State Leakage Current
10
A max
Floating-State Output Capacitance
5
15
pF max
CONVERSION TIME
External Clock
10
s max
Internal Clock
10.5
11
s max
The Internal Clock Has a Nominal Value of 2 MHz
POWER REQUIREMENTS
VDD
+5
V nom
±5% for Specified Performance
VSS
–5
V nom
±5% for Specified Performance
IDD
13
mA max
Typically 6 mA
ISS
6
mA max
Typically 4 mA
Power Dissipation
95
mW max
Typically 50 mW
NOTES
1Temperature ranges are as follows: J, K versions, 0
°C to +70°C; A, B versions, –40°C to +85°C; T version; –55°C to +125°C.
2V
IN = ± 3 V.
3SNR calculation includes distortion and noise components.
4Measured with respect to internal reference.
5Sample tested @ +25
°C to ensure compliance.
Specifications subject to change without notice.
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