參數(shù)資料
型號: AD7870BQ
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP24
封裝: 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-24
文件頁數(shù): 8/20頁
文件大?。?/td> 331K
代理商: AD7870BQ
REV. B
AD7870/AD7875/AD7876
–8–
straight binary with 1 LSB = FS/4096 = 5 V/4096 = 1.22 mV.
T he ideal input/output transfer function is shown in Figure 7.
Figure 5c. AD7875 Analog Input
Figure 6. AD7870/AD7876 Transfer Function
Figure 7. AD7875 Transfer Function
OFFSE T AND FULL-SCALE ADJUST ME NT —AD7870
In most digital signal processing (DSP) applications, offset and
full-scale errors have little or no effect on system performance.
Offset error can always be eliminated in the analog domain by
ac coupling. Full-scale error effect is linear and does not cause
problems as long as the input signal is within the full dynamic
range of the ADC. Some applications will require that the input
signal span the full analog input dynamic range. In such applica-
tions, offset and full-scale error will have to be adjusted to zero.
Where adjustment is required, offset error must be adjusted be-
fore full-scale error. T his is achieved by trimming the offset of
the op amp driving the analog input of the AD7870 while the
input voltage is 1/2 LSB below ground. T he trim procedure is as
follows: apply a voltage of –0.73 mV(–1/2 LSB) at V
1
in Figure
8 and adjust the op amp offset voltage until the ADC output
code flickers between 1111 1111 1111 and 0000 0000 0000.
Gain error can be adjusted at either the first code transition
(ADC negative full-scale) or the last code transition (ADC posi-
tive full scale). T he trim procedures for both cases are as follows
(see Figure 8).
Figure 8. Offset and Full-Scale Adjust Circuit
Positive Full-Scale Adjust
Apply a voltage of 2.9978 V (FS/2 – 3/2 LSBs) at V
1
. Adjust R2
until the ADC output code flickers between 0111 1111 1110
and 0111 1111 1111.
Negative Full-Scale Adjust
Apply a voltage of –2.9993 V (–FS/2 + 1/2 LSB) at V
1
and ad-
just R2 until the ADC output code flickers between 1000 0000
0000 and 1000 0000 0001.
OFFSE T AND FULL-SCALE ADJUST ME NT —AD7876
T he offset and full-scale adjustment for the AD7876 is similar
to that just outlined for the AD7870. T he trim procedure, for
those applications that do require adjustment, is as follows:
apply a voltage of –2.44 mV (–1/2 LSB) at V
1
and adjust the op
amp offset voltage until the ADC output code flickers between
1111 1111 1111 and 0000 0000 0000. Full-scale error can be
adjusted at either the first code transition (ADC negative full
scale) or the last code transition (ADC positive full scale). T he
trim procedure for both case is as follows (see Figure 8):
Positive Full-Scale Adjust
Apply a voltage of 9.9927 V (FS/2 –3/2 LSBs) at V
1
. Adjust R2
until the ADC output code flickers between 0111 1111 1110
and 0111 1111 1111.
Negative Full-Scale Adjust
Apply a voltage of –9.9976 V (FS/2 + 1/2 LSB) at V
1
and adjust
R2 until the ADC output code flickers between 1000 0000 0000
and 1000 0000 0001.
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