參數(shù)資料
型號(hào)： AD7866ARUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/24頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT 2CHAN DUAL 20TSSOP
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 24mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，單極
配用： EVAL-AD7866CBZ-ND - BOARD EVALUATION AD7866
REV. A
–14–
AD7866
Digital Inputs
The digital inputs applied to the AD7866 are not limited by the
maximum ratings that limit the analog inputs. Instead, the digital
inputs applied can go to 7 V and are not restricted by the VDD +
0.3 V limit as on the analog inputs. See maximum ratings.
Another advantage of SCLK, RANGE, REF SELECT, A0, and
CS not being restricted by the V
DD + 0.3 V limit is that power
supply sequencing issues are avoided. If one of these digital inputs
is applied before VDD, there is no risk of latch-up, as there
would be on the analog inputs if a signal greater than 0.3 V were
applied prior to VDD.
VDRIVE
The AD7866 also has the VDRIVE feature, which controls the
voltage at which the serial interface operates. VDRIVE allows the
ADC to easily interface to both 3 V and 5 V processors. For
example, if the AD7866 was operated with a VDD of 5 V, the
VDRIVE pin could be powered from a 3 V supply, allowing a large
dynamic range with low voltage digital processors. For example,
the AD7866 could be used with the 2
VREF input range, with a
VDD of 5 V while still being able to interface to 3 V digital parts.
REFERENCE CONFIGURATION OPTIONS
The AD7866 has various reference configuration options. The
REF SELECT pin allows the choice of using an internal 2.5 V
reference or applying an external reference, or even an individual
external reference for each on-chip ADC if desired. If the REF
SELECT pin is tied to AGND, then the on-chip 2.5 V reference
is used as the reference source for both ADC A and ADC B. In
addition, pins VREF, DCAPA, and DCAPB must be tied to decoupling
capacitors (100 nF, 470 nF, and 470 nF recommended,
respectively). If the REF SELECT pin is tied to a logic high, an
external reference can be supplied to the AD7866 through the
VREF pin to overdrive the on-chip reference, in which case
decoupling capacitors are required on DCAPA and DCAPB again.
However, if the VREF pin is tied to AGND while REF SELECT
is tied to a logic low, an individual external reference can be
applied to both ADC A and ADC B through pins DCAPA and
DCAPB, respectively. Table II summarizes these reference options.
For specified performance, the last configuration was used with
the same reference voltage applied to both DCAPA and DCAPB.
The connections for the relevant reference pins are shown in the
typical connection diagrams. If the internal reference is being
used, the VREF pin should have a 100 nF capacitor connected to
AGND very close to the VREF pin. These connections are shown
in Figure 12.
DCAPB
DCAPA
VREF
470nF
AD7866
470nF
100nF
Figure 12. Relevant Connections when Using an
Internal Reference
DCAPB
DCAPA
VREF
AD7866
VREF
REF SELECT
Figure 13. Relevant Connections when Applying
an External Reference at DCAP A and/or DCAP B
DCAPB
DCAPA
VREF
470nF
AD7866
470nF
VREF
REF SELECT
VDRIVE
Figure 14. Relevant Connections when Applying
an External Reference at VREF
Figure 13 shows the connections required when an external
reference is applied to DCAPA and DCAPB. In this example, the
same reference voltage is applied at each pin; however, a different
voltage may be applied at each of these pins for each on-chip
ADC. An external reference applied at these pins may have a
range from 2 V to 3 V, but for specified performance it must be
within
±1% of 2.5 V. Figure 14 shows the third option, which is
to overdrive the internal reference through the VREF pin. This is
possible due to the series resistance from the VREF pin to the
internal reference. This external reference can have a range from
2 V to 3 V; but again, to get as close as possible to the specified
performance, a 2.5 V reference is desirable. DCAPA and DCAPB
decouple each on-chip reference buffer, as shown in Figure 15.
Table II. Reference Selection
Reference Option
REF SELECT
VREF
1
DCAP A and DCAPB
2
Internal
Low
Decoupling Capacitor
Externally through VREF
High
External Reference
Decoupling Capacitor
Externally through
DCAP A and/or DCAPB
Low
AGND
External Reference A and/or
Reference B
NOTES
1Recommended value of decoupling capacitor = 100 nF.
2Recommended value of decoupling capacitor = 470 nF.
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