參數(shù)資料
型號(hào): AD7864ASZ-2
廠商: Analog Devices Inc
文件頁(yè)數(shù): 19/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT PAR 520K 4CH 44MQFP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 520k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 120mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-QFP
供應(yīng)商設(shè)備封裝: 44-MQFP(10x10)
包裝: 托盤(pán)
輸入數(shù)目和類型: 4 個(gè)差分,單極
AD7864
Rev. D | Page 26 of 28
MULTIPLE AD7864S IN A SYSTEM
Figure 27 shows a system where a number of AD7864s are
configured to handle multiple input channels. This type of
configuration is common in applications such as sonar and
radar. The AD7864 is specified with maximum limits on
aperture delay match. This means that the user knows the
difference in the sampling instant between all channels. This
allows the user to maintain relative phase information between
the different channels. The AD7864 has a maximum aperture
delay matching of 4 ns.
All AD7864s use the same external SAR clock (5 MHz).
Therefore, the conversion time for all devices is identical;
consequently, all devices can be read simultaneously. In the
example shown in Figure 27, the data outputs of two AD7864s
are enabled onto a 32-bit wide data bus when EOC goes low.
EOC
AD7864
VIN1
VIN2
VIN3
VIN4
ADDRESS
DECODE
VREF
CLKIN
CS
RD
12
32
AD7864
VIN1
VIN2
VIN3
VIN4
VREF
CLKIN
12
ADSP-2106x
RD
REF193
5MHz
CS
RD
01
34
1-
0
26
Figure 27. Multiple AD7864s in Multichannel System
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