參數(shù)資料
型號: AD7863BR-10
廠商: Analog Devices Inc
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: IC ADC 14BIT DUAL 2CH 28-SOIC
標準包裝: 1
位數(shù): 14
采樣率(每秒): 175k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 94.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
輸入數(shù)目和類型: 4 個單端,單極;4 個單端,雙極
AD7863
Rev. B | Page 9 of 24
CONVERTER DETAILS
The AD7863 is a high speed, low power, dual 14-bit analog-to-
digital converter that operates from a single 5 V supply. The
part contains two 5.2 μs successive approximation ADCs, two
track-and-hold amplifiers, an internal 2.5 V reference, and a
high speed parallel interface. Four analog inputs are grouped
into two channels (A and B) selected by the A0 input. Each
channel has two inputs (VA1 and VA2 or VB1 and VB2) that can be
sampled and converted simultaneously, thus preserving the
relative phase information of the signals on both analog inputs.
The part accepts an analog input range of ±10 V (AD7863-10),
±2.5 V (AD7863-3), and 0 V to 2.5 V (AD7863-2). Overvoltage
protection on the analog inputs for the part allows the input
voltage to go to ±17 V, ±7 V, or +7 V, respectively, without
causing damage. The AD7863 has two operating modes, the high
sampling mode and the auto sleep mode, where the part auto-
matically goes into sleep after the end of conversion. These modes
are discussed in more detail in the Timing and Control section.
Conversion is initiated on the AD7863 by pulsing the CONVST
input. On the falling edge of CONVST, both on-chip track-and-
holds are simultaneously placed into hold and the conversion
sequence is started on both channels. The conversion clock for
the part is generated internally using a laser-trimmed clock
oscillator circuit. The BUSY signal indicates the end of
conversion and at this time the conversion results for both
channels are available to be read. The first read after a conver-
sion accesses the result from VA1 or VB1, and the second read
accesses the result from VA2 or VB2, depending on whether the
multiplexer select A0 is low or high, respectively, before the
conversion is initiated. Data is read from the part via a 14-bit
parallel data bus with standard CS and RD signals.
Conversion time for the AD7863 is 5.2 μs in the high sampling
mode (10 μs for the auto sleep mode), and the track/hold
acquisition time is 0.5 μs. To obtain optimum performance
from the part, the read operation should not occur during the
conversion or during the 400 ns prior to the next conversion.
This allows the part to operate at throughput rates up to 175 kHz
and achieve data sheet specifications.
TRACK-AND-HOLD SECTION
The track-and-hold amplifiers on the AD7863 allow the ADCs
to accurately convert an input sine wave of full-scale amplitude
to 14-bit accuracy. The input bandwidth of the track-and-hold
is greater than the Nyquist rate of the ADC, even when the
ADC is operated at its maximum throughput rate of 175 kHz
(that is, the track-and hold can handle input frequencies in
excess of 87.5 kHz).
The track-and-hold amplifiers acquire input signals to 14-bit
accuracy in less than 500 ns. The operation of the track-and-
holds is essentially transparent to the user. The two track-and-hold
amplifiers sample their respective input channels simultaneously,
on the falling edge of CONVST. The aperture time for the
track-and-holds (that is, the delay time between the external
CONVST signal and the track-and-hold actually going into
hold) is well-matched across the two track-and-holds on one
device and also well-matched from device to device. This allows
the relative phase information between different input channels
to be accurately preserved. It also allows multiple AD7863s to
simultaneously sample more than two channels. At the end of
conversion, the part returns to its tracking mode. The acquisition
time of the track-and-hold amplifiers begins at this point.
REFERENCE SECTION
The AD7863 contains a single reference pin, labeled VREF, that
provides access to the part’s own 2.5 V reference. Alternatively,
an external 2.5 V reference can be connected to this pin, thus
providing the reference source for the part. The part is specified
with a 2.5 V reference voltage. Errors in the reference source
result in gain errors in the AD7863 transfer function and add to
the specified full-scale errors on the part. On the AD7863-10
and AD7863-3, it also results in an offset error injected in the
attenuator stage.
The AD7863 contains an on-chip 2.5 V reference. To use this
reference as the reference source for the AD7863, connect two
0.1 μF disc ceramic capacitors from the VREF pin to AGND. The
voltage that appears at this pin is internally buffered before
being applied to the ADC. If this reference is required for use
external to the AD7863, it should be buffered because the part
has a FET switch in series with the reference output resulting in
a source impedance for this output of 5.5 kΩ nominal. The
tolerance on the internal reference is ±10 mV at 25°C with a
typical temperature coefficient of 25 ppm/°C and a maximum
error over temperature of ±25 mV.
If the application requires a reference with a tighter tolerance or
the AD7863 needs to be used with a system reference, the user
has the option of connecting an external reference to this VREF
pin. The external reference effectively overdrives the internal
reference and thus provides the reference source for the ADC.
The reference input is buffered before being applied to the ADC
with a maximum input current of ±100 μA. A suitable reference
source for the AD7863 is the AD780 precision 2.5 V reference.
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