VREF
參數(shù)資料
型號(hào)： AD7858LBNZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/32頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT 8CHAN SRL 24DIP
產(chǎn)品變化通告： Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝： 15
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： 8051，QSPI?，串行，SPI? µP
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 33mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 24-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 24-PDIP
包裝： 管件
輸入數(shù)目和類型： 8 個(gè)單端，單極；4 個(gè)偽差分，單極
AD7858/AD7858L
REV. B
–17–
Input Range
The analog input range for the AD7858/AD7858L is 0 V to
VREF. The AIN(–) pin on the AD7858/AD7858L can be biased
up above AGND, if required. The advantage of biasing the
lower end of the analog input range away from AGND is that
the user does not need to have the analog input swing all the
way down to AGND. This has the advantage in true single-
supply applications that the input amplifier does not need to
swing all the way down to AGND. The upper end of the analog
input range is shifted up by the same amount. Care must be
taken so that the bias applied does not shift the upper end of the
analog input above the AVDD supply. In the case where the
reference is the supply, AVDD, the AIN(–) must be tied to
AGND.
AD7858/
AD7858L
AIN(+)
AIN(–)
TRACK AND HOLD
AMPLIFIER
DOUT
STRAIGHT
BINARY
FORMAT
VIN = 0 TO VREF
Figure 14. 0 to VREF Input Configuration
Transfer Function
For the AD7858/AD7858L input range the designed code tran-
sitions occur midway between successive integer LSB values
(i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . . FS – 3/2 LSBs). The
output coding is straight binary with 1 LSB = FS/4096 = 3.3 V/
4096 = 0.8 mV when VREF = 3.3 V. The ideal input/output
transfer characteristic is shown in Figure 15.
OUTPUT
CODE
111...111
111...110
111...101
111...100
000...011
000...010
000...001
000...000
1LSB = FS
4096
0V 1LSB
+FS –1LSB
VIN = (AIN(+) – AIN(–)), INPUT VOLTAGE
Figure 15. AD7858/AD7858L Transfer Characteristic
REFERENCE SECTION
For specified performance, it is recommended that when using
an external reference this reference should be between 2.3 V
and the analog supply AVDD. The connections for the relevant
reference pins are shown in the typical connection diagrams. If
the internal reference is being used, the REFIN/REFOUT pin
should have a 100 nF capacitor connected to AGND very close
to the REFIN/REFOUT pin. These connections are shown in
Figure 16.
If the internal reference is required for use external to the ADC,
it should be buffered at the REFIN/REFOUT pin and a 100 nF
connected from this pin to AGND. The typical noise performance
for the internal reference, with 5 V supplies, is 150 nV/
√Hz @
1 kHz and dc noise is 100
V p-p.
0.1 F
0.01 F
0.1 F
10 F
0.1 F
AD7858/
AD7858L
ANALOG SUPPLY
+3V TO +5V
AVDD
DVDD
CREF1
CREF2
REFIN/REFOUT
Figure 16. Relevant Connections When Using Internal
Reference
The other option is that the REFIN/REFOUT pin be overdriven
by connecting it to an external reference. This is possible due to
the series resistance from the REFIN/REFOUT pin to the internal
reference. This external reference can have a range that includes
AVDD. When using AVDD as the reference source, the 100 nF
capacitor from the REFIN/REFOUT pin to AGND should be as
close as possible to the REFIN/REFOUT pin, and also the CREF1
pin should be connected to AVDD to keep this pin at the same
level as the reference. The connections for this arrangement are
shown in Figure 17. When using AVDD it may be necessary to
add a resistor in series with the AVDD supply. This will have the
effect of filtering the noise associated with the AVDD supply.
0.1 F
0.01 F
0.1 F
10 F
0.1 F
AD7858/
AD7858L
ANALOG SUPPLY
+3V TO +5V
AVDD
DVDD
CREF1
CREF2
REFIN/REFOUT
Figure 17. Relevant Connections When Using AVDD as the
Reference
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