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參數(shù)資料
| 型號： | AD7856ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 8CHAN 5V 24SOIC |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標準包裝： | 400 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 285k |
| 數(shù)據(jù)接口： | 8051，QSPI?，串行，SPI? µP |
| 轉換器數(shù)目： | 2 |
| 功率耗散（最大）： | 89.25mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極；4 個偽差分，單極 |
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AD7856
–15–
REV. A
AUTO CAL ON
POWER-UP
AVDD DVDD
AIN(+)
AIN(–)
CREF1
CREF2
SLEEP
DIN
DOUT
SYNC
CONVST
AGND
DGND
CLKIN
SCLK
REFIN/REFOUT
AD7856
ANALOG
SUPPLY
+5V
0.1 F
10 F
DVDD
0.01 F
MASTER CLOCK
INPUT
CONVERSION
START INPUT
FRAME SYNC INPUT
SERIAL DATA
OUTPUT
0.1 F
CAL
0.01 F
INTERNAL/
EXTERNAL
REFERENCE
0V TO 4.096V
INPUT
6MHz/4MHz OSCILLATOR
SERIAL CLOCK
INPUT
285kHz/148kHz PULSE GENERATOR
CH1
CH2
CH3
CH4
OSCILLOSCOPE
OPTIONAL
EXTERNAL
REFERENCE
AD780/
REF-198
SERIAL DATA INPUT
CH5
PULSE GENERATOR
DATA GENERATOR
0.1 F
2 LEADING
ZEROS FOR
ADC DATA
470nF
Figure 10. Typical Circuit
CIRCUIT INFORMATION
The AD7856 is a fast, 14-bit single supply A/D converter. The
part requires an external 6 MHz/4 MHz master clock (CLKIN),
two CREF capacitors, a CONVST signal to start conversion and
power supply decoupling capacitors. The part provides the user
with track/hold, on-chip reference, calibration features, A/D
converter and serial interface logic functions on a single chip.
The A/D converter section of the AD7856 consists of a conven-
tional successive-approximation converter based around a ca-
pacitor DAC. The AD7856 accepts an analog input range of 0
to +VDD where the reference can be tied to VDD. The reference
input to the part is buffered on-chip.
A major advantage of the AD7856 is that a conversion can be
initiated in software as well as applying a signal to the
CONVST
pin. Another innovative feature of the AD7856 is self-calibration
on power-up, which is initiated having a 0.01
F capacitor from
the
CAL pin to DGND, to give superior dc accuracy. The part
should be allowed 150 ms after power up to perform this auto-
matic calibration before any reading or writing takes place. The
part is available in a 24-pin SSOP package and this offers the
user considerable spacing saving advantages over alternative
solutions.
CONVERTER DETAILS
The master clock for the part must be applied to the CLKIN
pin. Conversion is initiated on the AD7856 by pulsing the
CONVST input or by writing to the control register and setting
the CONVST bit to 1. On the rising edge of
CONVST (or at
the end of the control register write operation), the on-chip
track/hold goes from track to hold mode. The falling edge of the
CLKIN signal that follows the rising edge of the
CONVST
signal initiates the conversion, provided the rising edge of
CONVST occurs at least 10 ns typically before this CLKIN
edge. The conversion cycle will take 20 CLKIN periods from
this CLKIN falling edge. If the 10 ns setup time is not met, the
conversion will take 21 CLKIN periods. The maximum speci-
fied conversion time is 3.5
s (6 MHz) 5.25 s (4 MHz) for the
AD7856. When a conversion is completed, the BUSY output
goes low, and then the result of the conversion can be read by
accessing the data through the serial interface. To obtain opti-
mum performance from the part, the read operation should not
occur during the conversion or 500 ns prior to the next
CONVST
rising edge. However, the maximum throughput rates are achieved
by reading/writing during conversion, and reading/writing during
conversion is likely to degrade the Signal to (Noise + Distor-
tion) by only 0.5 dBs. The AD7856 can operate at throughput
rates up to 285 kHz. For the AD7856 a conversion takes 21
CLKIN periods; two CLKIN periods are needed for the acqui-
sition time, giving a full cycle time of 3.66
s (= 260 kHz, CLKIN
= 6 MHz). When using the software conversion start for maximum
throughput the user must ensure the control register write op-
eration extends beyond the falling edge of BUSY. The falling
edge of BUSY resets the
CONVST bit to 0 and allows it to be
reprogrammed to 1 to start the next conversion.
TYPICAL CONNECTION DIAGRAM
Figure 10 shows a typical connection diagram for the AD7856.
The AGND and DGND pins are connected together at the
device for good noise suppression. The
CAL pin has a 0.01
F
capacitor to enable an automatic self-calibration on power-up.
The conversion result is output in a 16-bit word with two lead-
ing zeros followed by the MSB of the 14-bit result. Note that
after the AVDD and DVDD power-up the part will require 150 ms
for the internal reference to settle and for the automatic calibra-
tion on power-up to be completed.
For applications where power consumption is a major concern
the
SLEEP pin can be connected to DGND. See Power-Down
section for more detail on low power applications.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7856KR | 制造商:Analog Devices 功能描述:ADC Single SAR 285ksps 14-bit Serial 24-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:8 CH. 14-BIT 300 KSPS ADC I.C. - Bulk |
| AD7856KR-REEL | 功能描述:IC ADC 14BIT 8CH 5V 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7856KR-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 285ksps 14-bit Serial 24-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:8 CH. 14-BIT 300 KSPS ADC I.C. - Tape and Reel |
| AD7856KRZ | 功能描述:IC ADC 14BIT 8CHAN 5V 24SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7858 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC |
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