參數(shù)資料
型號(hào): AD783SQ
英文描述: Single Chip 12-Bit Data Acquisition System; Package: PDIP; No of Pins: 20; Temperature Range: 0°C to +70°C
中文描述: 采樣/跟蹤和保持放大器
文件頁(yè)數(shù): 7/8頁(yè)
文件大?。?/td> 131K
代理商: AD783SQ
AD783
REV. A
–7–
T he AD783 does not provide separate analog and digital ground
leads as is the case with most A-to-D converters. T he common
pin is the single ground terminal for the device. It is the refer-
ence point for the sampled input voltage and the held output
voltage and also the digital ground return path. T he common
pin should be connected to the reference (analog) ground of the
A-to-D converter with a separate ground lead. Since the analog
and digital grounds in the AD783 are connected internally, the
common pin should also be connected to the digital ground,
which is usually tied to analog common at the A-to-D converter.
Figure 3 illustrates the recommended decoupling and grounding
practice.
NOISE CHARACT E RIST ICS
Designers of data conversion circuits must also consider the
effect of noise sources on the accuracy of the data acquisition
system. A sample-and-hold amplifier that precedes the A-to-D
converter introduces some noise and represents another source
of uncertainty in the conversion process. T he noise from the
AD783 is specified as the total output noise, which includes
both the sampled wideband noise of the SHA in addition to the
band limited output noise. T he total output noise is the rms
sum of the sampled dc uncertainty and the hold mode noise. A
plot of the total output noise vs. the equivalent input bandwidth
of the converter being used is given in Figure 4.
300
0
1k
10M
200
100
10k
1M
100k
FREQUENCY – Hz
O
μ
V
Figure 4. RMS Noise vs. Input Bandwidth of ADC
DRIVING T HE ANALOG INPUT S
For best performance, it is important to drive the AD783 analog
input from a low impedance signal source. T his enhances the
sampling accuracy by minimizing the analog and digital cross-
talk. Signals which come from higher impedance sources (e.g.,
over 5 k
) will have a relatively higher level of crosstalk. For
applications where signals have high source impedance, an
operational amplifier buffer in front of the AD783 is required.
T he AD711 (precision BiFET op amp) is recommended for
these applications.
HIGH FRE QUE NCY SAMPLING
Aperture jitter and distortion are the primary factors which limit
frequency domain performance of a sample-and-hold amplifier.
Aperture jitter modulates the phase of the hold command and
produces an effective noise on the sampled analog input. T he
magnitude of the jitter induced noise is directly related to the
frequency of the input signal.
A graph showing the magnitude of the jitter induced error vs.
frequency of the input signal is given in Figure 5.
T he accuracy in sampling high frequency signals is also
constrained by the distortion and noise created by the
sample-and-hold. T he level of distortion increases with
frequency and reduces the “effective number of bits” of the
conversion.
Measurements of Figures 6 and 7 were made using a 14-bit
A/D converter with V
IN
= 5 V p-p and a sample frequency of
100 kSPS.
1%
1k
1M
0.1%
0.01%
10k
100k
FREQUENCY – Hz
APERTURE JITTER TYPICAL AT 20ps
1/2 BIT @
8 BITS
1/2 BIT @
10 BITS
1/2 BIT @
12 BITS
1/2 BIT @
14 BITS
Figure 5. Error Magnitude vs. Frequency
–65
–95
1M
–80
–90
1k
–85
100
–70
–75
100k
10k
FREQUENCY – Hz
T
Figure 6. Total Harmonic Distortion vs. Frequency
90
0
1M
20
10
10k
1k
30
40
50
60
70
80
100k
FREQUENCY – Hz
S
Figure 7. Signal/(Noise and Distortion) vs. Frequency
相關(guān)PDF資料
PDF描述
AD783JQ Complete Very High Speed Sample-and-Hold Amplifier
AD783JR Complete Very High Speed Sample-and-Hold Amplifier
AD783AQ Complete Very High Speed Sample-and-Hold Amplifier
AD783AR Complete Very High Speed Sample-and-Hold Amplifier
AD7848AQ 12-Bit Digital-to-Analog Converter
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