參數(shù)資料
型號(hào): AD7829BRUZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 8BIT 8CHAN 2MSPS 28TSSOP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 8
采樣率(每秒): 2M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 36mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極
AD7822/AD7825/AD7829
Rev. C | Page 19 of 28
AD7822 STANDALONE OPERATION
The AD7822, being the single channel device, does not have any
multiplexer addressing associated with it and can be controlled
with just one signal, that is, the CONVST signal. As shown in
Figure 31, the RD and CS pins are both tied to the EOC pin.
The resulting signal can be used as an interrupt request signal
(IRQ) on a DSP, as a WR signal to memory, or as a CLK to a
latch or ASIC. The timing for this interface, as shown in Figure 31,
demonstrates how, with the CONVST signal alone, a conversion
can be initiated, data is latched out, and the operating mode of
the AD7822 can be selected.
AD7825/
AD7829
A0
A1
A2
CS
RD
DB7 TO DB0
CS
RD
DB0 TO DB7
A15 TO A3
A2 TO A0
ADC I/O ADDRESS
MUX ADDRESS
A/D RESULT
MUX ADDRESS
(CHANNEL SELECTION A0 TO A2)
LATCHED
MICROPROCESSOR READ CYCLE
ADDRESS
DECODE
SYST
EM
B
U
S
01
32
1-
03
1
A15 TO A3
Figure 30. AD7825/AD7829 Simplified Microinterfacing Scheme
CONVST
RD
CS
EOC
DB7 TO DB0
AD7822
DSP/
LATCH/ASIC
CONVST
EOC
RD
CS
DB0 TO DB7
A/D RESULT
t1
t4
01
32
1-
0
32
Figure 31. AD7822 Standalone Operation
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