參數(shù)資料
型號： AD7794CRUZ
廠商： Analog Devices Inc
文件頁數(shù)： 4/37頁
文件大?。?/td> 0K
描述： IC ADC 24BIT 6CH LP 24-TSSOP
產(chǎn)品培訓模塊： ADC Applications
ADC Architectures
ADC DC/AC Performance
標準包裝： 62
位數(shù)： 24
采樣率（每秒）： 470
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 2.5mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 管件
輸入數(shù)目和類型： 6 個差分，單極；6 個差分，雙極
產(chǎn)品目錄頁面： 779 (CN2011-ZH PDF)
配用： EVAL-AD7794EBZ-ND - BOARD EVALUATION FOR AD7794
AD7794/AD7795
Rev. D | Page 11 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
0
48
54
-0
05
NC = NO CONNECT
AD7794/
AD7795
TOP VIEW
(Not to Scale)
SCLK 1
DIN
24
CLK 2
DOUT/RDY
23
CS 3
DVDD
22
NC 4
AVDD
21
AIN6(+)/P1 5
GND
20
AIN6(–)/P2 6
PSW
19
AIN1(+) 7
AIN4(–)/REFIN2(–)
18
AIN1(–) 8
AIN4(+)/REFIN2(+)
17
AIN2(+) 9
AIN5(–)/IOUT1
16
AIN2(–) 10
AIN5(+)/IOUT2
15
AIN3(+) 11
REFIN1(–)
14
AIN3(–) 12
REFIN1(+)
13
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
SCLK
Serial Clock Input. This serial clock input is for data transfers to and from the ADC. The SCLK has a Schmitt-
triggered input, making the interface suitable for opto-isolated applications. The serial clock can be
continuous with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous
clock with the information being transmitted to or from the ADC in smaller batches of data.
2
CLK
Clock In/Clock Out. The internal clock can be made available at this pin. Alternatively, the internal clock can
be disabled, and the ADC can be driven by an external clock. This allows several ADCs to be driven from a
common clock, allowing simultaneous conversions to be performed.
3
CS
Chip Select Input. This is an active low logic input used to select the ADC. CS can be used to select the ADC in
systems with more than one device on the serial bus or as a frame synchronization signal in communicating
with the device. CS can be hardwired low, allowing the ADC to operate in 3-wire mode with SCLK, DIN, and
DOUT used to interface with the device.
4
NC
No Connect.
5
AIN6(+)/P1
Analog Input/Digital Output Pin. AIN6(+) is the positive terminal of the differential analog input pair,
AIN6(+)/AIN6(). This pin can also function as a general-purpose output bit referenced between AVDD and GND.
6
AIN6()/P2
Analog Input/Digital Output Pin. AIN6() is the negative terminal of the differential analog input pair,
AIN6(+)/AIN6(). This pin can also function as a general-purpose output bit referenced between AVDD and GND.
7
AIN1(+)
Analog Input. AIN1(+) is the positive terminal of the differential analog input pair, AIN1(+)/AIN1().
8
AIN1()
Analog Input. AIN1() is the negative terminal of the differential analog input pair, AIN1(+)/AIN1().
9
AIN2(+)
Analog Input. AIN2(+) is the positive terminal of the differential analog input pair, AIN2(+)/AIN2().
10
AIN2()
Analog Input. AIN2() is the negative terminal of the differential analog input pair, AIN2(+)/AIN2().
11
AIN3(+)
Analog Input. AIN3(+) is the positive terminal of the differential analog input pair, AIN3(+)/AIN3().
12
AIN3()
Analog Input. AIN3() is the negative terminal of the differential analog input pair, AIN3(+)/AIN3().
13
REFIN1(+)
Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1(). REFIN1(+)
can lie anywhere between AVDD and GND + 0.1 V. The nominal reference voltage, (REFIN1(+) REFIN1()), is
2.5 V, but the part functions with a reference from 0.1 V to AVDD.
14
REFIN1()
Negative Reference Input. This reference input can lie anywhere between GND and AVDD 0.1 V.
15
AIN5(+)/IOUT2
Analog Input/Output of Internal Excitation Current Source. AIN5(+) is the positive terminal of the differential
analog input pair AIN5(+)/AIN5(). Alternatively, the internal excitation current source can be made available at
this pin and is programmable so that the current can be 10 μA, 210 μA, or 1 mA. Either IEXC1 or IEXC2 can be
switched to this output.
16
AIN5()/IOUT1
Analog Input/Output of Internal Excitation Current Source. AIN5() is the negative terminal of the
differential analog input pair, AIN5(+)/AIN5(). Alternatively, the internal excitation current source can be
made available at this pin and is programmable so that the current can be 10 μA, 210 μA, or 1 mA. Either
IEXC1 or IEXC2 can be switched to this output.
17
AIN4(+)/REFIN2(+)
Analog Input/Positive Reference Input. AIN4(+) is the positive terminal of the differential analog input pair
AIN4(+)/AIN4(). This pin also functions as a positive reference input for REFIN2. REFIN2(+) can lie anywhere
between AVDD and GND + 0.1 V. The nominal reference voltage (REFIN2(+) to REFIN2()) is 2.5 V, but the part
functions with a reference from 0.1 V to AVDD.
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