參數(shù)資料
型號(hào): AD7794BRUZ-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 26/37頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 6CH LP 24-TSSOP
產(chǎn)品培訓(xùn)模塊: ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 24
采樣率(每秒): 470
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 6 個(gè)差分,單極;6 個(gè)差分,雙極
配用: EVAL-AD7794EBZ-ND - BOARD EVALUATION FOR AD7794
AD7794/AD7795
Rev. D | Page 31 of 36
CIRCUIT DESCRIPTION
ANALOG INPUT CHANNEL
The AD7794/AD7795 have six differential analog input
channels. These are connected to the on-chip buffer amplifier
when the devices are operated in buffered mode. When in
unbuffered mode, the channels connect directly to the
modulator. In buffered mode (the BUF bit in the configuration
register is set to 1), the input channel feeds into a high
impedance input stage of the buffer amplifier. Therefore, the
input can tolerate significant source impedances and is tailored
for direct connection to external resistive-type sensors such as
strain gages or resistance temperature detectors (RTDs).
When BUF = 0, the parts operate in unbuffered mode. This
results in a higher analog input current. Note that this
unbuffered input path provides a dynamic load to the driving
source. Therefore, resistor/capacitor combinations on the input
pins can cause gain errors, depending on the output impedance
of the source that is driving the ADC input. Table 22 shows the
allowable external resistance/capacitance values for unbuffered
mode so that no gain error at the 20-bit level is introduced.
Table 22. External R-C Combination for 20-Bit No Gain Error
Capacitance (pF)
Resistance (Ω)
50
9 k
100
6 k
500
1.5 k
1000
900
5000
200
The AD7794/AD7795 can be operated in unbuffered mode
only when the gain equals 1 or 2. At higher gains, the buffer
is automatically enabled. The absolute input voltage range in
buffered mode is restricted to a range between GND + 100 mV
and AVDD 100 mV. When the gain is set to 4 or higher, the
in-amp is enabled. The absolute input voltage range when the in-
amp is active is restricted to a range between GND + 300 mV and
AVDD 1.1 V. Care must be taken in setting up the common-
mode voltage so that these limits are not exceeded. Otherwise,
there is degradation in linearity and noise performance.
The absolute input voltage in unbuffered mode includes the
range between GND 30 mV and AVDD + 30 mV as a result of
being unbuffered. The negative absolute input voltage limit does
allow the possibility of monitoring small, true bipolar signals
with respect to GND.
INSTRUMENTATION AMPLIFIER
Amplifying the analog input signal by a gain of 1 or 2 is
performed digitally within the AD7794/AD7795. However,
when the gain equals 4 or higher, the output from the buffer is
applied to the input of the on-chip instrumentation amplifier.
This low noise in-amp means that signals of small amplitude
can be gained within the AD7794/AD7795 while still
maintaining excellent noise performance. For example, when
the gain is set to 64, the rms noise is 40 nV typically, which is
equivalent to 21 bits effective resolution or 18.5 bits peak-to-
peak resolution.
Each AD7794/AD7795 can be programmed to have a gain of 1,
2, 4, 8, 16, 32, 64, and 128 using Bit G2 to Bit G0 in the
configuration register. Therefore, with an external 2.5 V
reference, the unipolar ranges are from 0 mV to 20 mV to 0 V
to 2.5 V and the bipolar ranges are from ±20 mV to ±2.5 V.
When the in-amp is active (gain ≥ 4), the common-mode
voltage ((AIN(+) + AIN())/2) must be greater than or equal to
0.5 V when chop is enabled. With chop disabled, and with the
AMP-CM bit set to 1 to prevent degradation in the common-
mode rejection, the allowable common-mode voltage is limited
to between
0.2 + (Gain/2 × (AIN(+) AIN()))
and
AVDD 0.2 (Gain/2 × (AIN(+) AIN()))
If the AD7794/AD7795 are operated with an external reference
that has a value equal to AVDD, for correct operation, the analog
input signal must be limited to 90% of VREF/gain when the in-
amp is active.
BIPOLAR/UNIPOLAR CONFIGURATION
The analog input to the AD7794/AD7795 can accept either
unipolar or bipolar input voltage ranges. A bipolar input range
does not imply that the parts can tolerate negative voltages with
respect to system GND. Unipolar and bipolar signals on the
AIN(+) input are referenced to the voltage on the AIN() input.
For example, if AIN() is 2.5 V and the ADC is configured for
unipolar mode with a gain of 1, the input voltage range on the
AIN(+) pin is 2.5 V to 5 V.
If the ADC is configured for bipolar mode, the analog input
range on the AIN(+) input is 0 V to 5 V. The bipolar/unipolar
option is chosen by programming the U/B bit in the
configuration register.
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