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參數資料
| 型號： | AD7731BRU |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 37/44頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT SIGMA-DELTA 24TSSOP |
| 標準包裝： | 1 |
| 位數： | 24 |
| 采樣率（每秒）： | 6.4k |
| 數據接口： | DSP，串行，SPI? |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 125mW |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 輸入數目和類型： | 3 個差分，單極；3 個差分，雙極；5 個偽差分，單極；5 個偽差分，雙極 |
| 配用： | EVAL-AD7731EBZ-ND - BOARD EVALUATION FOR AD7731 |
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AD7731
–42–
REV. 0
Bipolar Input Signals
As mentioned previously, some applications will require that the
AD7731 handle input signals that are negative with respect to
system ground. The number of applications requiring this are
limited but with the addition of some external components the
AD7731 is capable of handling such signals. Figure 25 outlines
one approach to the problem.
The example shown is a system that is driven from
±5 V sup-
plies. In such a circuit, two issues must be addressed. The first
is how to get the AD7731 to handle input voltages below ground
and the second is how to generate a suitable reference voltage
for the AD7731. The circuit of Figure 25 attempts to address
these two issues simultaneously.
The AD7731’s analog and digital supplies can be split such that
AVDD and DVDD can be at separate potentials and AGND and
DGND can also be at separate potentials. The only stipulation
to go down to –2.5 V with respect to system ground. This
means that all logic signals to the part must not exceed 3 V with
respect to system ground. The AVDD is operated at +2.5 V with
respect to system ground.
The resistor string R1, R2 and R3 takes the
±5 V supply voltage
and generates a differential voltage of nominally 5 V. Amplifiers
A1 and A2 buffer the resistor string voltages and provide the
AVDD and AGND voltages as well as the REF IN(+) and REF
IN(–) voltages for the AD7731. The differential reference volt-
age for the part is +5 V. If the input voltage is from a transducer
excited by the
±5 V, the AD7731 retains its ratiometric opera-
tion with this reference voltage varying in sympathy with the
analog input voltage.
The values of the resistors in the resistor string are chosen as-
suming the maximum input voltage range of
±1.28 V is applied
to the AD7731. The minimum input voltage must be 1.2 V above
the AD7731’s AGND, while the maximum input voltage must be
0.95 V below the AD7731’s AVDD. For smaller input voltage
ranges, the resistor ratios in the resistor string can be changed
to allow a larger DVDD voltage. For example, if R1 = 3 k
,
R2 = 10 k
and R3 = 6.8 k, the AV
DD and AGND voltages
become +3.49 V and –1.56 V respectively. This allows the
AD7731 to be used with a +3.6 V DVDD voltage while allowing
analog input ranges of
±320 mV and below.
An alternate scheme is to generate the AVDD and AGND volt-
ages from regulators or Zener diodes driven from the +5 V and
–5 V supplies respectively. The reference voltage for the part
can be generated from an AD780 whose GND pin is connected
to the AD7731’s AGND pin.
Figure 25. Bipolar Input Signals on the AD7731
+5V
–5V
SIGMA-
DELTA
MODULATOR
DVDD
AD7731
SERIAL INTERFACE
AND CONTROL LOGIC
REGISTER BANK
CLOCK
GENERATION
PROGRAMMABLE
DIGITAL
FILTER
SIGMA-DELTA A/D CONVERTER
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
RESET
RDY
POL
DGND
CALIBRATION
MICROCONTROLLER
REF IN(+)
AVDD
AIN1(+)
AIN1(–)
SYSTEM
GROUND
+3V
A1
A2
+5V
–5V
+5V
–5V
R1
5k
R2
10k
R3
5k
1/2 OP284
OR 1/2 OP213
1/2 OP284
OR 1/2 OP213
REF IN(–)
AGND
ALL VOLTAGE VALUES ARE WITH
RESPECT TO SYSTEM GROUND.
BUFFER
PGA
SWITCHING
MATRIX
100nA
AGND
100nA
AVDD
REV. A
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