參數(shù)資料
型號(hào)： AD7718BRU-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 24/44頁
文件大小： 0K
描述： IC ADC 24BIT R-R 8/10CH 28-TSSOP
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 24
采樣率（每秒）： 1.37k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 3.84mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 5 個(gè)差分，單極；5 個(gè)差分，雙極；10 偽差分，單極；10 偽差分，雙極
配用： EVAL-AD7718EBZ-ND - BOARD EVALUATION FOR AD7718
REV. 0
–30–
AD7708/AD7718
I/O Control Register (IOCON): (A3, A2, A1, A0 = 0, 1, 1, 1; Power-On-Reset = 00Hex)
The IOCON Register is an 8-bit register from which data can be read or to which data can be written. This register is used to con-
trol and configure the I/O port. Table XIX outlines the bit designations for this register. IOCON7 through IOCON0 indicate the
bit location, IOCON denoting the bits are in the I/O Control Register. IOCON7 denotes the first bit of the data stream. The num-
ber in brackets indicates the power-on/reset default status of that bit. A write to the IOCON register has immediate effect and does
not reset the ADCs.
7
N
O
C
O
I6
N
O
C
O
I5
N
O
C
O
I4
N
O
C
O
I3
N
O
C
O
I2
N
O
C
O
I1
N
O
C
O
I0
N
O
C
O
I
)
0
(0
)
0
()
0
(
R
I
D
2
PR
I
D
1
P)
0
(0
)
0
()
0
(
0)
0
(
T
A
D
2
P)
0
(
T
A
D
1
P
Table XIX. IOCON (I/O Control Register) Bit Designations
Bit
Location
Mnemonic
Description
IOCON7
0
This bit should always be cleared. Reserved for future use.
IOCON6
0
This bit should always be cleared. Reserved for future use.
IOCON5
P2DIR
P2, I/O Direction Control Bit.
Set by user to enable P2 as an output.
Cleared by user to enable P2 as an input. There are weak pull-ups internally when enabled
as an input.
IOCON4
P1DIR
P1, I/O Direction Control Bit.
Set by user to enable P1 as an output.
Cleared by user to enable P1 as an input. There are weak pull-ups internally when enabled
as an input.
IOCON3
0
This bit should always be cleared. Reserved for future use.
IOCON2
0
This bit should always be cleared. Reserved for future use.
IOCON1
P2DAT
Digital I/O Port (P1) Data Bit.
The readback value of this bit indicates the status of the pin regardless of whether this pin is
configured as an input or an output. The value written to this data bit will appear at the
output port when the I/O pin is enabled as an output.
IOCON0
P1DAT
Digital I/O port (P1) Data Bit.
The readback value of this bit indicates the status of the pin, regardless of whether this pin is
configured as an input or an output. The value written to this data bit will appear at the
output port when the I/O pin is enabled as an output.
ADC Data Result Register (DATA): (A3, A2, A1, A0 = 0, 1, 0, 0; Power-On-Reset = 000000Hex)
The conversion result for the selected ADC channel is stored in the ADC data register (DATA). This register is 16 bits wide on the
AD7708 and 24 bits wide on the AD7718. This is a read only register. On completion of a read from this register the RDY bit in
the status register is cleared. These ADCs can be operated in either unipolar or bipolar mode of operation.
Unipolar Mode
In unipolar mode of operation the output coding is straight binary. With an analog input voltage of 0 V the output code is 0000Hex
for the AD7708 and 000000Hex for the AD7718. With an analog input voltage of 1.024 VREF/Gain the output code is FFFFHex
for the AD7708 and FFFFFF Hex for the AD7718. The output code for any analog input voltage can be represented as follows:
Code = (AIN
× GAIN × 2N)/(1.024 × VREF)
where
AIN is the analog input voltage and
N = 16 for the AD7708 and N = 24 for the AD7718.
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