- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373914 > AD7715AN-5 (ANALOG DEVICES INC) 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC PDF資料下載
參數(shù)資料
| 型號： | AD7715AN-5 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001AB, DIP-16 |
| 文件頁數(shù)： | 7/31頁 |
| 文件大小： | 474K |
| 代理商： | AD7715AN-5 |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
AD7715
–7–
REV. C
PIN FUNCTION DESCRIPTION
Pin No.
Mnemonic
Function
1
SCLK
Serial Clock. Logic Input. An external serial clock is applied to this input to access serial data from
the AD7715. This serial clock can be a continuous clock with all data transmitted in a continuous
train of pulses. Alternatively, it can be a noncontinuous clock with the information being transmit-
ted to the AD7715 in smaller batches of data.
Master Clock signal for the device. This can be provided in the form of a crystal/resonator or exter-
nal clock. A crystal/resonator can be tied across the MCLK IN and MCLK OUT pins. Alterna-
tively, the MCLK IN pin can be driven with a CMOS-compatible clock and MCLK OUT left
unconnected. The part is specified with clock input frequencies of both 1MHz and 2.4576MHz.
When the master clock for the device is a crystal/resonator, the crystal/resonator is connected be-
tween MCLK IN and MCLKOUT. If an external clock is applied to MCLK IN, MCLKOUT
provides an inverted clock signal. This clock can be used to provide a clock source for external
circuitry.
Chip Select. Active low Logic Input used to select the AD7715. With this input hardwired low, the
AD7715 can operate in its three-wire interface mode with SCLK, DIN and DOUT used to inter-
face to the device.
CS
can be used to select the device in systems with more than one device on the
serial bus or as a frame synchronization signal in communicating with the AD7715.
Logic Input. Active low input which resets the control logic, interface logic, calibration coefficients,
digital filter and analog modulator of the part to power-on status.
Analog Positive Supply Voltage, +3.3V nominal (AD7715-3) or +5V nominal (AD7715-5).
Analog Input. Positive input of the programmable gain differential analog input to the AD7715.
Analog Input. Negative input of the programmable gain differential analog input to the AD7715.
Reference Input. Positive input of the differential reference input to the AD7715. The reference
input is differential with the provision that REF IN(+) must be greater than REF IN(–).
REFIN(+) can lie anywhere between AV
DD
and AGND.
Reference Input. Negative input of the differential reference input to the AD7715. The REFIN(–)
can lie anywhere between AV
DD
and AGND provided REFIN(+) is greater than REFIN(–).
Ground reference point for analog circuitry. For correct operation of the AD7715, no voltage on
any of the other pins should go more than 30 mV negative with respect to AGND.
Logic Output. A logic low on this output indicates that a new output word is available from the
AD7715 data register. The
DRDY
pin will return high upon completion of a read operation of a full
output word. If no data read has taken place between output updates, the
DRDY
line will return
high for 500
×
t
CLKIN
cycles prior to the next output update. While
DRDY
is high, a read operation
should not be attempted or in progress to avoid reading from the data register as it is being updated.
The
DRDY
line will return low again when the update has taken place.
DRDY
is also used to indi-
cate when the AD7715 has completed its on-chip calibration sequence.
Serial Data Output with serial data being read from the output shift register on the part. This output
shift register can contain information from the setup register, communications register or data regis-
ter depending on the register selection bits of the Communications Register.
Serial Data Input with serial data being written to the input shift register on the part. Data from this
input shift register is transferred to the setup register or communications register depending on the
register selection bits of the Communications Register.
Digital Supply Voltage, +3.3V or +5 V nominal.
Ground reference point for digital circuitry.
2
MCLK IN
3
MCLK OUT
4
CS
5
RESET
6
7
8
9
AV
DD
AIN(+)
AIN(–)
REF IN(+)
10
REF IN(–)
11
AGND
12
DRDY
13
DOUT
14
DIN
15
16
DV
DD
DGND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7715AR-3 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715AR-5 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715* | 3 V/5 V. 450 uA 16-Bit. Sigma-Delta ADC |
| AD7715ACHIPS-3 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715ACHIPS-5 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7715ANZ-3 | 功能描述:IC ADC 16BIT SIGMA-DELTA 16DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7715ANZ-31 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
| AD7715ANZ-5 | 功能描述:IC ADC 16BIT 5V 16-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7715ANZ-5 | 制造商:Analog Devices 功能描述:A/D Converter (A-D) IC |
| AD7715ANZ-51 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。