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參數(shù)資料
| 型號： | AD7715* |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V/5 V. 450 uA 16-Bit. Sigma-Delta ADC |
| 中文描述： | 3 V / 5號五，450微安16位。 Σ-Δ模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 23/31頁 |
| 文件大?。?/td> | 474K |
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AD7715
–23–
REV. C
either via a software error or by some glitch in the system, it can
be reset back into a known state. This state returns the interface
to where the AD7715 is expecting a write operation to its Com-
munications Register. This operation in itself does not reset the
contents of any registers, but since the interface was lost, the
information which was written to any of the registers is un-
known and it is advisable to set up all registers again.
Some microprocessor or microcontroller serial interfaces have a
single serial data line. In this case, it is possible to connect the
AD7715’s DATA OUT and DATA IN lines together and con-
nect then to the single data line of the processor. A 10 k
pull-
up resistor should be used on this single data line. In this case, if
the interface gets lost, because the read and write operations
share the same line the procedure to reset it back to a known
state is somewhat different than described previously. It requires
a read operation of 24 serial clocks followed by a write operation
where a logic 1 is written for at least 32 serial clock cycles to
ensure that the serial interface is back into a known state.
CONFIGURING THE AD7715
The AD7715 contains three on-chip registers which the user
accesses via the serial interface. Communication with any of
these registers is initiated by writing to the Communications
Register first. Figure 8 outlines a flow diagram of the sequence
which is used to configure all registers after a power-up or reset.
The flowchart also shows two different read options—the first
where the
DRDY
pin is polled to determine when an update of
the data register has taken place, the second where the
DRDY
bit of the Communications Register is interrogated to see if a
data register update has taken place. Also included in the flow-
ing diagram is a series of words which should be written to the
registers for a particular set of operating conditions. These con-
ditions are gain of 1, no filter sync, bipolar mode, buffer off,
clock of 2.4576MHz and an output rate of 60 Hz.
START
CONFIGURE & INITIALIZE
m
C/
m
P SERIAL PORT
POWER-ON/RESET FOR AD7715
WRITE TO COMMUNICATIONS REGISTER SETTING UP
GAIN & SETTING UP NEXT OPERATION TO BE A WRITE
TO THE SETUP REGISTER (10 HEX)
WRITE TO SETUP REGISTER SETTING UP REQUIRED
VALUES & INITIATING A SELF CALIBRATION (68 HEX)
POLL
DRDY
PIN
DRDY
LOW
YES
NO
WRITE TO COMMUNICATIONS REGISTER SETTING UP
SAME GAIN & SETTING UP NEXT OPERATION TO BE A
READ FROM THE DATA REGISTER (38 HEX)
READ FROM DATA REGISTER
POLL
DRDY
BIT OF COMMUNICATIONS REGISTER
YES
NO
WRITE TO COMMUNICATIONS REGISTER SETTING UP
SAME GAIN & SETTING UP NEXT OPERATION TO BE A
READ FROM THE DATA REGISTER (38 HEX)
WRITE TO COMMUNICATIONS REGISTER SETTING UP SAME
GAIN & SETTING UP NEXT OPERATION TO BE A READ FROM
THE COMMUNICATIONS REGISTER (08 HEX)
READ FROM COMMUNICATIONS REGISTER
DRDY
LOW
READ FROM DATA REGISTER
Figure 8. Flowchart for Setting Up and Reading from the AD7715
相關(guān)PDF資料 |
PDF描述 |
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| AD7715ACHIPS-3 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715ACHIPS-5 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7719BRU | Low Voltage, Low Power, Factory-Calibrated 16-/24-Bit Dual ADC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7715_10 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
| AD7715-5EB | 制造商:Analog Devices 功能描述: |
| AD7715ACHIPS-3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715ACHIPS-5 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
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