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參數(shù)資料
| 型號： | AD7713ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT SIGMA-DELTA 24-DIP |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 205 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 5.5mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 24-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)差分，單極；1 個(gè)差分，雙極 |
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REV. D
AD7713
–9–
CONTROL REGISTER (24 BITS)
A write to the device with the A0 input low writes data to the
control register. A read to the device with the A0 input low
accesses the contents of the control register. The control register
is 24 bits wide. When writing to the register, 24 bits of data
must be written; otherwise, the data will not be loaded to the
MSB
MD2
MD1
MD0
G2
G1
G0
CH1
CH0
WL
RO
BO
B/U
FS11
FS10
FS9
FS8
FS7
FS6
FS5
FS4
FS3
FS2
FS1
FS0
LSB
Operating Mode
MD2
MD1
MD0
Operating Mode
00
0
Normal Mode. This is the normal mode of operation of the device whereby a read to the device with A0 high
accesses data from the data register. This is the default condition of these bits after the internal power-on reset.
00
1Activate Self-Calibration. This activates self-calibration on the channel selected by CH0 and CH1. This is
a 1-step calibration sequence, and when complete, the part returns to normal mode (with MD2, MD1,
MD0 of the control registers returning to 0, 0, 0). The
DRDY output indicates when this self-calibration
is complete. For this calibration type, the zero-scale calibration is done internally on shorted (zeroed)
inputs, and the full-scale calibration is done on VREF.
01
0Activate System Calibration. This activates system calibration on the channel selected by CH0 and CH1.
This is a 2-step calibration sequence, with the zero-scale calibration done first on the selected input
channel and
DRDY indicating when this zero-scale calibration is complete. The part returns to normal
mode at the end of this first step in the 2-step sequence.
01
1Activate System Calibration. This is the second step of the system calibration sequence with full-scale
calibration being performed on the selected input channel. Once again,
DRDY indicates when the full-
scale calibration is complete. When this calibration is complete, the part returns to normal mode.
10
0
Activate System Offset Calibration. This activates system offset calibration on the channel selected by CH0
and CH1. This is a 1-step calibration sequence and, when complete, the part returns to normal mode with
DRDY indicating when this system offset calibration is complete. For this calibration type, the zero-scale
calibration is done on the selected input channel, and the full-scale calibration is done internally on VREF.
10
1
Activate Background Calibration. This activates background calibration on the channel selected by CH0 and
CH1. If the background calibration mode is on, the AD7713 provides continuous self-calibration of the refer-
ence and shorted (zeroed) inputs. This calibration takes place as part of the conversion sequence, extending
the conversion time and reducing the word rate by a factor of 6. Its major advantage is that the user does
not have to worry about recalibrating the device when there is a change in the ambient temperature. In
this mode, the shorted (zeroed) inputs and VREF, as well as the analog input voltage, are continuously
monitored, and the calibration registers of the device are updated.
11
0Read/Write Zero-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents of
the zero-scale calibration coefficients of the channel selected by CH0 and CH1. A write to the device with
A0 high writes data to the zero-scale calibration coefficients of the channel selected by CH0 and CH1.
The word length for reading and writing these coefficients is 24 bits, regardless of the status of the WL bit
of the control register. Therefore, when writing to the calibration register, 24 bits of data must be written;
otherwise, the new data will not be transferred to the calibration register.
11
1Read/Write Full-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents of
the full-scale calibration coefficients of the channel selected by CH0 and CH1. A write to the device with
A0 high writes data to the full-scale calibration coefficients of the channel selected by CH0 and CH1. The
word length for reading and writing these coefficients is 24 bits, regardless of the status of the WL bit of
the control register. Therefore, when writing to the calibration register, 24 bits of data must be written;
otherwise, the new data will not be transferred to the calibration register.
control register. In other words, it is not possible to write just
the first 12 bits of data into the control register. If more than 24
clock pulses are provided before
TFS returns high, then all clock
pulses after the 24th clock pulse are ignored. Similarly, a read
operation from the control register should access 24 bits of data.
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