參數(shù)資料
型號(hào)： AD7713*
廠商： Analog Devices, Inc.
英文描述： LC2MOS Loop-Powered Signal Conditioning ADC
中文描述： LC2MOS回路供電ADC的信號(hào)調(diào)理
文件頁(yè)數(shù)： 12/28頁(yè)
文件大?。?/td> 516K
REV. C
–12–
AD7713
Figure 2 gives similar information to that outlined in Table I. In this plot, the output rms noise is shown for the full range of avail-
able cutoff frequencies rather than for some typical cutoff frequencies as in Tables I and II. The numbers given in these plots are
typical values at 25
°
C.
10
1000
10000
100
NOTCH FREQUENCY — Hz
10000
100
0.1
1000
10
1
O
GAIN OF 1
GAIN OF 2
GAIN OF 4
GAIN OF 8
Figure 2a. Plot of Output Noise vs. Gain and Notch
Frequency (Gains of 1 to 8)
CIRCUIT DESCRIPTION
The AD7713 is a sigma-delta A/D converter with on-chip digi-
tal filtering, intended for the measurement of wide dynamic
range, low frequency signals such as those in industrial control
or process control applications. It contains a sigma-delta (or
charge balancing) ADC, a calibration microcontroller with on-
chip static RAM, a clock oscillator, a digital filter and a bidirec-
tional serial communications port.
The part contains three analog input channels, two program-
mable gain differential input and one programmable gain high-
level single-ended input. The gain range on both inputs is from
1 to 128. For the AIN1 and AIN2 inputs, this means that the
input can accept unipolar signals of between 0 mV to +20 mV
and 0 V to +2.5 V or bipolar signals in the range from
±
20 mV
to
±
2.5 V when the reference input voltage equals +2.5 V. The
input voltage range for the AIN3 input is +4
×
V
REF
/GAIN and
is 0 V to + 10 V with the nominal reference of +2.5 V and a
gain of 1. The input signal to the selected analog input channel
is continuously sampled at a rate determined by the frequency
of the master clock, MCLK IN, and the selected gain (see
Table III). A charge balancing A/D converter (Sigma-Delta
Modulator) converts the sampled signal into a digital pulse train
whose duty cycle contains the digital information. The program-
mable gain function on the analog input is also incorporated in
this sigma-delta modulator with the input sampling frequency
being modified to give the higher gains. A sinc
3
digital low-pass
filter processes the output of the sigma-delta modulator and up-
dates the output register at a rate determined by the first notch
frequency of this filter. The output data can be read from the
serial port randomly or periodically at any rate up to the output
register update rate. The first notch of this digital filter (and
hence
its –3 dB frequency) can be programmed via an on-chip
control register. The programmable range for this first notch
frequency is from 1.952 Hz to 205.59 Hz, giving a programma-
ble range for the –3 dB frequency of 0.52 Hz to 53.9 Hz.
The basic connection diagram for the part is shown in Figure 3.
This shows the AD7713 in the external clocking mode with
both the AV
DD
and DV
DD
pins of the AD7713 being driven
NOTCH FREQUENCY — Hz
10
1000
10000
100
1000
10
0.1
100
1
0
GAIN OF 16
GAIN OF 32
GAIN OF 64
GAIN OF 128
Figure 2b. Plot of Output Noise vs. Gain and Notch
Frequency (Gain of 16 to 128)
from the analog +5 V supply. Some applications will have sepa-
rate supplies for both AV
DD
and DV
DD
and in some of these
cases the analog
s
upply will exceed the +5 V digital
s
upply (see
Power Supplies and Grounding section).
REF IN(+)
AIN1(+)
AIN1(–)
AIN3
AV
DD
DV
DD
AGND
DGND
MCLK IN
MCLK OUT
SCLK
SDATA
DRDY
TFS
RFS
REF IN(–)
SYNC
A0
ANALOG +5V
SUPPLY
10μF
0.1μF
0.1μF
AD7713
DIFFERENTIAL
ANALOG
INPUT
SINGLE–ENDED
ANALOG INPUT
ANALOG
GROUND
DIGITAL
GROUND
DATA
READY
RECEIVE
(READ)
SERIAL
DATA
SERIAL
CLOCK
TRANSMIT
(WRITE)
MODE
DV
DD
STANDBY
ADDRESS
INPUT
DV
DD
AIN2(+)
AIN2(–)
{
DIFFERENTIAL
ANALOG INPUT
+2.5V
REFERENCE
{
Figure 3. Basic Connection Diagram
The AD7713 provides a number of calibration options which
can be programmed via the on-chip control register. A calibra-
tion cycle may be initiated at any time by writing to this control
register. The part can perform self-calibration using the on-chip
calibration microcontroller and SRAM to store calibration
parameters. Other system components may also be included in
the calibration loop to remove offset and gain errors in the input
channel using the system calibration mode. Another option is a
background calibration mode where the part continuously per-
forms self-calibration and updates the calibration coefficients.
Once the part is in this mode, the user does not have to worry
about issuing periodic calibration commands to the device or
asking the device to recalibrate when there is a change in the
ambient temperature or power supply voltage.
相關(guān)PDF資料
PDF描述
AD7713AN LC2MOS Loop-Powered Signal Conditioning ADC
AD7713AQ LC2MOS Loop-Powered Signal Conditioning ADC
AD7713AR LC2MOS Loop-Powered Signal Conditioning ADC
AD7713SQ LC2MOS Loop-Powered Signal Conditioning ADC
AD7713 Loop-Powered Signal Conditioning ADC(循環(huán)驅(qū)動(dòng)LC2MOS信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD7713ANZ 功能描述:IC ADC 24BIT SIGMA-DELTA 24-DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類(lèi)型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱(chēng):497-5435-6
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