參數(shù)資料
型號(hào)： AD7712AR-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 17/28頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT SGNL CONDTNR 24SOIC
標(biāo)準(zhǔn)包裝： 400
位數(shù)： 24
采樣率（每秒）： 1.03k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 45mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)單端，單極；1 個(gè)差分，單極；1 個(gè)差分，雙極
REV. F
–24–
AD7712
SIMPLIFYING THE EXTERNAL CLOCKING MODE
INTERFACE
In many applications, the user may not require the facility of
writing to the on-chip calibration registers. In this case, the
serial interface to the AD7712 in external clocking mode can be
simplified by connecting the
TFS line to the A0 input of the
AD7712 (see Figure 15). This means that any write to the device
will load data to the control register (since A0 is low while
TFS
is low), and any read to the device will access data from the out-
put data register or from the calibration registers (since A0 is
high while
RFS is low). It should be noted that in this arrange-
ment the user does not have the capability of reading from the
control register.
AD7712
SDATA
SCLK
TFS
A0
FOUR INTER-
FACE LINES
RFS
Figure 15. Simplified Interface with
TFS Connected to A0
Another method of simplifying the interface is to generate the
TFS signal from an inverted RFS signal. However, generating
the signals the opposite way around (
RFS from an inverted
TFS) will cause writing errors.
MICROCOMPUTER/MICROPROCESSOR INTERFACING
The AD7712’s flexible serial interface allows easy interface to
most microcomputers and microprocessors. Figure 16 shows a
flowchart diagram for a typical programming sequence for read-
ing data from the AD7712 to a microcomputer while Figure 17
shows a flowchart diagram for writing data to the AD7712.
Figures 18, 19, and 20 show some typical interface circuits.
The flowchart of Figure 16 is for continuous read operations
from the AD7712 output register. In the example shown, the
DRDY line is continuously polled. Depending on the micro-
processor configuration, the
DRDY line may come to an
interrupt input, in which case the
DRDY will automatically
generate an interrupt without being polled. Reading the serial
buffer could be anything from one read operation up to three
read operations (where 24 bits of data are read into an 8-bit
serial register). A read operation to the control/calibration
registers is similar, but, in this case, the status of
DRDY can
be ignored. The A0 line is brought low when the
RFS line is
brought low when reading from the control register.
The flowchart also shows the bits being reversed after they have
been read in from the serial port. This depends on whether the
microprocessor expects the MSB of the word first or the LSB of
the word first. The AD7712 outputs the MSB first.
NO
YES
BRING
RFS LOW
3
REVERSE
ORDER OF BITS
BRING
RFS HIGH
POLL
DRDY
CONFIGURE AND
INITIALIZE
C/ P
SERIAL PORT
DRDY
LOW?
BRING
RFS, TFS HIGH
READ
SERIAL BUFFER
START
Figure 16. Flowchart for Continuous Read
Operations to the AD7712
The flowchart in Figure 17 is for a single 24-bit write operation
to the AD7712 control or calibration registers. This shows data
being transferred from data memory to the accumulator before
being written to the serial buffer. Some microprocessor systems
will allow data to be written directly to the serial buffer from data
memory. Writing data to the serial buffer from the accumulator
will generally consist of either two or three write operations,
depending on the size of the serial buffer.
The flowchart also shows the option of the bits being reversed
before being written to the serial buffer. This depends on
whether the first bit transmitted by the microprocessor is the
MSB or the LSB. The AD7712 expects the MSB as the first bit
in the data stream. In cases where the data is being read or
being written in bytes and the data has to be reversed, the bits
will have to be reversed for every byte.
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