參數(shù)資料
型號(hào)： AD7711AR
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： LC2MOS Signal Conditioning ADC with RTD Excitation Currents
中文描述： 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24
封裝： MS-013AD, SOIC-24
文件頁(yè)數(shù)： 24/28頁(yè)
文件大?。?/td> 242K
代理商： AD7711AR
REV. F
–24–
AD7711
SIMPLIFYING THE EXTERNAL CLOCKING MODE
INTERFACE
In many applications, the user may not require the facility of
writing to the on-chip calibration registers. In this case, the
serial interface to the AD7711 in external clocking mode can be
simplified by connecting the
TFS
line to the A0 input of the
AD7711 (see Figure 14). This means that any write to the de-
vice will load data to the control register (since A0 is low while
TFS
is low) and any read to the device will access data from the
output data register or from the calibration registers (since A0 is
high while
RFS
is low). It should be noted that in this arrange-
ment the user does not have the capability of reading from the
control register.
AD7711
RFS
SDATA
SCLK
TFS
A0
FOUR
INTERFACE
LINES
Figure 14. Simplified Interface with
TFS
Connected to A0
Another method of simplifying the interface is to generate the
TFS
signal from an inverted
RFS
signal. However, generating
the signals the opposite way around (
RFS
from an inverted
TFS
) will cause writing errors.
MICROCOMPUTER/MICROPROCESSOR INTERFACING
The AD7711’s flexible serial interface allows for easy interface
to most microcomputers and microprocessors. Figure 15 shows
a flowchart diagram for a typical programming sequence for
reading data from the AD7711 to a microcomputer while Figure
16 shows a flowchart diagram for writing data to the AD7711.
Figures 17, 18 and 19 show some typical interface circuits.
The flowchart of Figure 15 is for continuous read operations
from the AD7711 output register. In the example shown, the
DRDY
line is continuously polled. Depending on the micropro-
cessor configuration, the
DRDY
line may come to an interrupt
input in which case the
DRDY
will automatically generate an
interrupt without being polled. The reading of the serial buffer
could be anything from one read operation up to three read
operations (where 24 bits of data are read into an 8-bit serial
register). A read operation to the control/calibration registers is
similar but in this case the status of
DRDY
can be ignored. The
A0 line is brought low when the
RFS
line is brought low when
reading from the control register.
The flowchart also shows the bits being reversed after they have
been read in from the serial port. This depends on whether the
microprocessor expects the MSB of the word first or the LSB of
the word first. The AD7711 outputs the MSB first.
NO
YES
BRING
RFS
LOW
X3
REVERSE
ORDER OF BITS
BRING
RFS
HIGH
POLL
DRDY
CONFIGURE AND
INITIALIZE
m
C/
m
P
SERIAL PORT
DRDY
LOW
BRING
RFS
,
TFS
HIGH
START
READ
SERIAL BUFFER
Figure 15. Flowchart for Continuous Read Operations to
the AD7711
The flowchart for Figure 16 is for a single 24-bit write operation
to the AD7711 control or calibration registers. This shows data
being transferred from data memory to the accumulator before
being written to the serial buffer. Some microprocessor systems
will allow data to be written directly to the serial buffer from
data memory. The writing of data to the serial buffer from the
accumulator will generally consist of either two or three write
operations, depending on the size of the serial buffer.
The flowchart also shows the option of the bits being reversed
before being written to the serial buffer. This depends on
whether the first bit transmitted by the microprocessor is the
MSB or the LSB. The AD7711 expects the MSB as the first bit
in the data stream. In cases where the data is being read or
being written in bytes and the data has to be reversed, the bits
will have to be reversed for every byte.
相關(guān)PDF資料
PDF描述
AD7711SQ LC2MOS Signal Conditioning ADC with RTD Excitation Currents
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AD7711 LC2MOS Signal Conditioning ADC with RTD Excitation Currents(RTD激勵(lì)電流LC2MOS信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器)
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