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參數(shù)資料
| 型號： | AD7706* |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V/5 V. 1 mW 2-/3-Channel 16-Bit. Sigma-Delta ADCs |
| 中文描述： | 3 V / 5號五，1毫瓦2-/3-Channel 16位。 Σ-Δ模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 264K |
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AD7705/AD7706
–11–
REV. A
Table VI. Register Selection
RS2
RS1
RS0
Register
Register Size
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Communications Register
Setup Register
Clock Register
Data Register
Test Register
No Operation
Offset Register
Gain Register
8 Bits
8 Bits
8 Bits
16 Bits
8 Bits
24 Bits
24 Bits
R/
W
Read/
Write
Select. This bit selects whether the next operation is a read or write operation to the selected register.
A “0” indicates a write cycle for the next operation to the appropriate register, while a “1” indicates a read opera-
tion from the appropriate register.
Standby. Writing a “1” to this bit puts the part into its standby or power-down mode. In this mode, the part con-
sumes only 10
μ
A of power supply current. The part retains its calibration coefficients and control word informa-
tion when in STANDBY. Writing a “0” to this bit places the part in its normal operating mode.
Channel Select. These two bits select a channel for conversion or for access to the calibration coefficients as out-
lined in Table VII. Three pairs of calibration registers on the part are used to store the calibration coefficients
following a calibration on a channel. They are shown in Tables VII for the AD7705 and Table VIII for the AD7706
to indicate which channel combinations have independent calibration coefficients. With CH1 at Logic 1 and CH0
at a Logic 0, the part looks at the AIN1(–) input internally shorted to itself on the AD7705 or at COMMON
internally shorted to itself on the AD7706. This can be used as a test method to evaluate the noise performance of
the part with no external noise sources. In this mode, the AIN1(–)/COMMON input should be connected to
an external voltage within the allowable common-mode range for the part.
STBY
CH1–CH0
Table VII. Channel Selection for AD7705
CH1
CH0
AIN(+)
AIN(–)
Calibration Register Pair
0
0
1
1
0
1
0
1
AIN1(+)
AIN2(+)
AIN1(–)
AIN1(–)
AIN1(–)
AIN2(–)
AIN1(–)
AIN2(–)
Register Pair 0
Register Pair 1
Register Pair 0
Register Pair 2
Table VIII. Channel Selection for AD7706
CH1
CH0
AIN
Reference
Calibration Register Pair
0
0
1
1
0
1
0
1
AIN1
AIN2
COMMON
AIN3
COMMON
COMMON
COMMON
COMMON
Register Pair 0
Register Pair 1
Register Pair 0
Register Pair 2
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| AD7706BN | 功能描述:IC ADC 16BIT 3CH 16-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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