參數(shù)資料
型號(hào)： AD7706(中文)
廠商： Analog Devices, Inc.
英文描述： 3 V/5 V, 1 Mw 2-/3-Channel 16-Bit, Sigma-Delta ADCs(三輸入通道16位A/D轉(zhuǎn)換器)
中文描述： 3伏/ 5伏，1兆瓦2-/3-Channel 16位Σ-Δ模數(shù)轉(zhuǎn)換器（三輸入通道16位的A / D轉(zhuǎn)換器）
文件頁(yè)數(shù)： 31/35頁(yè)
文件大?。?/td> 652K
代理商： AD7706(中文)
==99-10-14==
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16 AD7705
ó
68HC11
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C
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/* This program has read and write routines for the 68HC11 to interface to the AD7705 and the sample program sets he various
registers and then reads 1000 samples rom one channel. */
#include <math.h>
#include <io6811.h>
#define NUM_SAMPLES 1000 /* change he number of data samples /
#define MAX_REG_LENGTH 2 /* this says hat the max length of a register is 2 bytes */
Writetoreg (int);
Read (int,char);
char *datapointer = store;
char store[NUM_SAMPLES*MAX_REG_LENGTH
+ 30];
void main()
{
/* the only pin that is programmed here from the 68HC11 is the /CS and this is why the PC2 bit of PORTC is made as
an output */
char a;
DDRC = 0x04; /* PC2 is an output the rest of the port bits are inputs */
PORTC | = 0x04; /* make the /CS line high */
Writetoreg(0x20); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the clock register */
Writetoreg(0x0C); /* master clock enabled, 4.9512MHz Clock, set output rate to 50Hz*/
Writetoreg(0x10); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the setup register */
Writetoreg(0x40); /* gain = 1, bipolar mode, buffer off, clear FSYNC and perform a Self Calibration*/
while(PORTC & 0x10); /* wait for /DRDY to go low */
for(a=0;a<NUM_SAMPLES;a++);
{
Writetoreg(0x38); /*set the next operation for 16 bit read from the data register */
Read(NUM_SAMPES,2);
}
}
Writetoreg(int byteword);
{
int q;
SPCR = 0x3f;
SPCR = 0X7f; /* this sets he WiredOR mode(DWOM=1), Master mode(MSTR=1), SCK idles high(CPOL=1), /SS can be low
always CPHA=1), lowest clock speed(slowest peed which is master clock /32 */
DDRD = 0x18; /* SCK, MOSI outputs */
q = SPSR;
q = SPDR; /* the read of the staus register and of the data register is needed o clear the interrupt which tells the user that the
data transfer is complete */
PORTC &= 0xfb; /* /CS is low */
SPDR = byteword; /* put the byte into data register */
while(!(SPSR & 0x80)); /* wait for /DRDY to go low */
PORTC |= 0x4; /* /CS high */
}
Read(int amount, int reglength)
{
int q;
SPCR = 0x3f;
SPCR = 0x7f; /* clear the interupt */
DDRD = 0x10; /* MOSI output, MISO input, SCK output */
while(PORTC & 0x10); /* wait for /DRDY to go low */
PORTC & 0xfb ; /* /CS is low */
for(b=0;b<reglength;b++)
{
SPDR = 0;
while(!(SPSR & 0x80)); /* wait until port ready before reading */
*datapointer++=SPDR; /* read SPDR into store array via datapointer */
}
PORTC|=4; /* /CS is high */
}
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