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參數(shù)資料
| 型號： | AD7694BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SRL 250KSPS 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 6.3mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
| 配用： | EVAL-AD7694CBZ-ND - BOARD EVALUATION FOR AD7694 |
AD7694
Rev. A | Page 13 of 16
05003-
020
AD7694
REF
GND
VDD
IN–
IN+
SCK
SDO
CNV
3-WIRE INTERFACE
100nF
2.7V TO 5.25V
2.2 TO 10
μF
(NOTE 2)
REF
0 TO VREF
33
Ω
2.7nF
(NOTE 3)
(NOTE 4)
(NOTE 1)
NOTES
1. SEE REFERENCE SECTION FOR REFERENCE SELECTION.
2. CREF IS USUALLY A 10μF CERAMIC CAPACITOR (X5R).
3. SEE DRIVER AMPLIFIER CHOICE SECTION.
4. OPTIONAL FILTER. SEE ANALOG INPUT SECTION.
Figure 20. Typical Application Diagram
TYPICAL CONNECTION DIAGRAM
Figure 20 shows an example of the recommended application
diagram for the AD7694.
ANALOG INPUT
Figure 21 shows an equivalent circuit of the AD7694 input
structure. The two diodes, D1 and D2, provide ESD protection
for the analog inputs, IN+ and IN. Care must be taken to
ensure that the analog input signal never exceeds the supply
rails by more than 0.3 V, because this will cause these diodes to
become forward-biased and start conducting current. However,
these diodes can handle a forward-biased current of 130 mA
maximum. For instance, these conditions could eventually
occur when the input buffer’s (U1) supplies are different from
VDD. In such a case, an input buffer with a short-circuit,
current limitation can be used to protect the part.
05003-021
CIN
RIN
D1
D2
CPIN
IN+
OR IN–
GND
VDD
Figure 21. Equivalent Analog Input Circuit
This analog input structure allows the sampling of the
differential signal between IN+ and IN. By using this
differential input, small signals common to both inputs are
rejected. For instance, by using IN to sense a remote signal
ground, ground potential differences between the sensor and
the local ADC ground are eliminated. During the acquisition
phase, the impedance of the analog input IN+ can be modeled
as a parallel combination of the capacitor CPIN and the network
formed by the series connection of RIN and CIN. CPIN is primarily
the pin capacitance. RIN is typically 600 Ω and is a lumped
component made up of some serial resistors and the on
resistance of the switches. CIN is typically 30 pF and is mainly
the ADC sampling capacitor. During the conversion phase,
where the switches are opened, the input impedance is limited
to CPIN. RIN and CIN make a 1-pole, low-pass filter that reduces
undesirable aliasing effects and limits the noise.
When the source impedance of the driving circuit is low, the
AD7694 can be driven directly. Large source impedances
significantly affect the ac performance, especially total
harmonic distortion (THD). The dc performances are less
sensitive to the input impedance.
DRIVER AMPLIFIER CHOICE
Although the AD7694 is easy to drive, the driver amplifier
needs to meet the following requirements:
The noise generated by the driver amplifier needs to be
kept as low as possible to preserve the SNR and transition
noise performance of the AD7694. Note that the AD7694
has a noise much lower than most of the other
16-bit ADCs and, therefore, can be driven by a noisier op
amp while preserving the same or better system perfor-
mance. The noise coming from the driver is filtered by the
AD7694 analog input circuit 1-pole, low-pass filter made
by R1 and C2 or by the external filter, if one is used.
For ac applications, the driver needs to have a THD
performance suitable to that of the AD7694. Figure 13
gives the THD vs. frequency that the driver should exceed.
For multichannel, multiplexed applications, the driver
amplifier and the AD7694 analog input circuit must be
able to settle for a full-scale step of the capacitor array at a
16-bit level (0.0015%). In the amplifier’s data sheet, settling
at 0.1% to 0.01% is more commonly specified. This could
differ significantly from the settling time at a 16-bit level
and should be verified prior to driver selection.
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